Capacitance–voltage profiling (or C–V profiling, sometimes CV profiling) is a technique for characterizing semiconductor materials and devices. The applied voltage is varied, and the capacitance is measured and plotted as a function of voltage. The technique uses a metal–semiconductor junction (Schottky barrier) or a p–n junction or a MOSFET to create a depletion region, a region which is empty of conducting electrons and holes, but may contain ionized donors and electrically active defects or traps. The depletion region with its ionized charges inside behaves like a capacitor. By varying the voltage applied to the junction it is possible to vary the depletion width. The dependence of the depletion width upon the applied voltage provides information on the semiconductor's internal characte
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| - Capacitance–voltage profiling (en)
- C-V特性曲线 (zh)
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| - C-V特性曲线(电容电压特性曲线)是用来测量半导体材料和器件的一种方法。当所加电压改变时,电容被测出。方法是使用金属-半导体结(肖特基势垒)或者PN结或者场效应管来得到耗尽层(其中载流子被全部抽走,但仍然有离子化的施主或晶体缺陷)。当电压改变时,耗尽层深浅也发生变化。 (zh)
- Capacitance–voltage profiling (or C–V profiling, sometimes CV profiling) is a technique for characterizing semiconductor materials and devices. The applied voltage is varied, and the capacitance is measured and plotted as a function of voltage. The technique uses a metal–semiconductor junction (Schottky barrier) or a p–n junction or a MOSFET to create a depletion region, a region which is empty of conducting electrons and holes, but may contain ionized donors and electrically active defects or traps. The depletion region with its ionized charges inside behaves like a capacitor. By varying the voltage applied to the junction it is possible to vary the depletion width. The dependence of the depletion width upon the applied voltage provides information on the semiconductor's internal characte (en)
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| - Capacitance–voltage profiling (or C–V profiling, sometimes CV profiling) is a technique for characterizing semiconductor materials and devices. The applied voltage is varied, and the capacitance is measured and plotted as a function of voltage. The technique uses a metal–semiconductor junction (Schottky barrier) or a p–n junction or a MOSFET to create a depletion region, a region which is empty of conducting electrons and holes, but may contain ionized donors and electrically active defects or traps. The depletion region with its ionized charges inside behaves like a capacitor. By varying the voltage applied to the junction it is possible to vary the depletion width. The dependence of the depletion width upon the applied voltage provides information on the semiconductor's internal characteristics, such as its doping profile and electrically active defect densities., Measurements may be done at DC, or using both DC and a small-signal AC signal (the conductance method, ), or using a large-signal transient voltage. (en)
- C-V特性曲线(电容电压特性曲线)是用来测量半导体材料和器件的一种方法。当所加电压改变时,电容被测出。方法是使用金属-半导体结(肖特基势垒)或者PN结或者场效应管来得到耗尽层(其中载流子被全部抽走,但仍然有离子化的施主或晶体缺陷)。当电压改变时,耗尽层深浅也发生变化。 (zh)
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