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About: ESi-RISC     Goto   Sponge   NotDistinct   Permalink

An Entity of Type : yago:Whole100003553, within Data Space : dbpedia.demo.openlinksw.com associated with source document(s)

Type: companyyago:Architecture102734725yago:Artifact100021939yago:Building102913152yago:Object100002684yago:PhysicalEntity100001930yago:YagoGeoEntityyago:YagoPermanentlyLocatedEntityyago:Structure104341686yago:Whole100003553 New Facet based on Instances of this Class

eSi-RISC is a configurable CPU architecture. It is available in five implementations: the eSi-1600, eSi-1650, eSi-3200, eSi-3250 and eSi-3264. The eSi-1600 and eSi-1650 feature a 16-bit data-path, while the eSi-32x0s feature 32-bit data-paths, and the eSi-3264 features a mixed 32/64-bit datapath. Each of these processors is licensed as soft IP cores, suitable for integrating into both ASICs and FPGAs.