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"Verilog HDL originated at Automated Integrated Design Systems (later renamed as Gateway Design Automation) in 1985. The company was privately held at that time by Dr. Prabhu Goel, the inventor of the PODEM (Path-Oriented Decision Making) test generation algorithm. Verilog HDL was designed by Phil Moorby, who was later to become the Chief Designer for Verilog-XL and the first Corporate Fellow at Cadence Design Systems. Gateway Design Automation grew rapidly with the success of Verilog-XL and was finally acquired by Cadence Design Systems, San Jose, CA in 1989."

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  • Gateway Design Automation (en)
  • Gateway设计自动化 (zh)
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  • "Verilog HDL originated at Automated Integrated Design Systems (later renamed as Gateway Design Automation) in 1985. The company was privately held at that time by Dr. Prabhu Goel, the inventor of the PODEM (Path-Oriented Decision Making) test generation algorithm. Verilog HDL was designed by Phil Moorby, who was later to become the Chief Designer for Verilog-XL and the first Corporate Fellow at Cadence Design Systems. Gateway Design Automation grew rapidly with the success of Verilog-XL and was finally acquired by Cadence Design Systems, San Jose, CA in 1989." (en)
  • Gateway设计自动化（英語：Gateway Design Automation）公司，最初名为自动化集成设计系统（Automated Integrated Design Systems）公司，是一个致力于电子设计自动化的企业，该公司于1985年改为现名。最初，公司由Prabhu Goel博士持有，他是PODEM测试生成算法的发明者。 Verilog硬件描述语言则由菲尔·莫比（Phil Moorby）设计，他后来成为了Verilog-XL的首席设计师，并成为了Cadence Design Systems的首批合伙人。凭借着Verilog-XL的成功，Gateway设计自动化迅猛发展，后来它于1989年被位于加利福尼亚州圣迭戈的Cadence公司收购。 (zh)
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  • "Verilog HDL originated at Automated Integrated Design Systems (later renamed as Gateway Design Automation) in 1985. The company was privately held at that time by Dr. Prabhu Goel, the inventor of the PODEM (Path-Oriented Decision Making) test generation algorithm. Verilog HDL was designed by Phil Moorby, who was later to become the Chief Designer for Verilog-XL and the first Corporate Fellow at Cadence Design Systems. Gateway Design Automation grew rapidly with the success of Verilog-XL and was finally acquired by Cadence Design Systems, San Jose, CA in 1989." (en)
  • Gateway设计自动化（英語：Gateway Design Automation）公司，最初名为自动化集成设计系统（Automated Integrated Design Systems）公司，是一个致力于电子设计自动化的企业，该公司于1985年改为现名。最初，公司由Prabhu Goel博士持有，他是PODEM测试生成算法的发明者。 Verilog硬件描述语言则由菲尔·莫比（Phil Moorby）设计，他后来成为了Verilog-XL的首席设计师，并成为了Cadence Design Systems的首批合伙人。凭借着Verilog-XL的成功，Gateway设计自动化迅猛发展，后来它于1989年被位于加利福尼亚州圣迭戈的Cadence公司收购。 (zh)
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