About: Bumpless Build-up Layer

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Bumpless Build-up Layer or BBUL is a processor packaging technology developed by Intel. It is bumpless, because it does not use the usual tiny solder bumps to attach the silicon die to the processor package wires. It has build-up layers, because is grown or built up around the silicon die. The usual way is to manufacture them separately and bond them together.

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rdf:type	company yago:Artifact100021939 yago:Chip103020034 yago:Conductor103088707 yago:Device103183080 yago:Instrumentality103575240 yago:Microprocessor103760310 yago:Object100002684 yago:PhysicalEntity100001930 yago:WikicatIntelMicroprocessors yago:SemiconductorDevice104171831 yago:Whole100003553
rdfs:label	Bumpless Build-up Layer (en)
rdfs:comment	Bumpless Build-up Layer or BBUL is a processor packaging technology developed by Intel. It is bumpless, because it does not use the usual tiny solder bumps to attach the silicon die to the processor package wires. It has build-up layers, because is grown or built up around the silicon die. The usual way is to manufacture them separately and bond them together. (en)
dcterms:subject	Intel microprocessors
Wikipage page ID	2360617 (xsd:integer)
Wikipage revision ID	902274974 (xsd:integer)
Link from a Wikipage to another Wikipage	Solder Central processing unit Flip chip Intel microprocessors Intel Silicon die dbr:Clock-frequency_competition
Link from a Wikipage to an external page	https://web.archive.org/web/20080425182736/http:/www.intel.com/pressroom/archive/backgrnd/20011008tech_bkgrd.htm https://web.archive.org/web/20131106105910/http:/www.sigrity.com/papers/asme_bbul.pdf http://www.dvhardware.net/article3950.html
sameAs	Bumpless Build-up Layer Bumpless Build-up Layer Bumpless Build-up Layer Bumpless Build-up Layer Bumpless Build-up Layer
dbp:wikiPageUsesTemplate	dbt:Microcompu-stub dbt:Citation_needed dbt:When
has abstract	Bumpless Build-up Layer or BBUL is a processor packaging technology developed by Intel. It is bumpless, because it does not use the usual tiny solder bumps to attach the silicon die to the processor package wires. It has build-up layers, because is grown or built up around the silicon die. The usual way is to manufacture them separately and bond them together. It was presented in October 2001. It should have been a key component in the 8 GHz and 15 GHz processors that should have been in the market by 2005 and 2007 respectively. Also 20 GHz should have been possible before the year 2010. The BBUL is not needed yet because there is no longer the . (en)
gold:hypernym	Technology
prov:wasDerivedFrom	wikipedia-en:Bumpless_Build-up_Layer?oldid=902274974&ns=0
page length (characters) of wiki page	1683 (xsd:nonNegativeInteger)
foaf:isPrimaryTopicOf	wikipedia-en:Bumpless_Build-up_Layer
is Link from a Wikipage to another Wikipage of	Intel BBUL
is Wikipage redirect of	BBUL
is foaf:primaryTopic of	wikipedia-en:Bumpless_Build-up_Layer

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