About: Die shrink

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The term die shrink (sometimes optical shrink or process shrink) refers to the scaling of metal-oxide-semiconductor (MOS) devices. The act of shrinking a die is to create a somewhat identical circuit using a more advanced fabrication process, usually involving an advance of lithographic nodes. This reduces overall costs for a chip company, as the absence of major architectural changes to the processor lowers research and development costs while at the same time allowing more processor dies to be manufactured on the same piece of silicon wafer, resulting in less cost per product sold.

Attributes	Values
rdf:type	Thing yago:WikicatMicroprocessors yago:Artifact100021939 yago:Chip103020034 yago:Circuit103033362 yago:ComputerCircuit103084420 yago:Conductor103088707 yago:Device103183080 yago:ElectricalDevice103269401 yago:Instrumentality103575240 yago:IntegratedCircuit103577090 yago:Microprocessor103760310 yago:Object100002684 yago:PhysicalEntity100001930 yago:WikicatIntegratedCircuits yago:SemiconductorDevice104171831 yago:Whole100003553
rdfs:label	Shrink (de) Die shrink (en) Die shrink (it) Die shrink (fr) 微細化 (ja) 다이 슈링크 (ko) Die shrink (pt)
rdfs:comment	The term die shrink (sometimes optical shrink or process shrink) refers to the scaling of metal-oxide-semiconductor (MOS) devices. The act of shrinking a die is to create a somewhat identical circuit using a more advanced fabrication process, usually involving an advance of lithographic nodes. This reduces overall costs for a chip company, as the absence of major architectural changes to the processor lowers research and development costs while at the same time allowing more processor dies to be manufactured on the same piece of silicon wafer, resulting in less cost per product sold. (en) En microélectronique, un die shrink est la réduction de la taille d'une puce électronique qui peut s'effectuer selon plusieurs manières : * par changement de technique de gravure : un produit peut être converti par les équipes de développement, par exemple passer de 65 nm de taille de transistor à 45 nm : cela aura pour effet de fortement diminuer les dimensions de la puce. * par une réduction optique de l'impression de la puce sur silicium. Cela a pour avantage de ne pas nécessiter de nouveau développement sur le produit, mais a l'inconvénient de risquer que les composants en interne ne fonctionnent plus de la manière prévue car les modèles ne prennent pas en compte cette réduction optique de la taille des éléments. (fr) 다이 슈링크(die shrink)는 반도체 소자, 주로 트랜지스터의 단순 반도체 공정을 가리킨다. (ko) 微細化（びさいか、die shrink、optical shrink、process shrink）とは、半導体デバイス特にトランジスタの単純な半導体スケーリングを指す言葉。ダイ（またはチップとも呼ぶ）の微細化は、リソグラフィックノードの進展など発展した製造プロセスで同じような回路を作ることである。微細化によってチップ製造メーカーの全体的なコストは低減する。なぜならプロセッサの大きな構造上の変更が無いことで研究開発コストが低減し、一方で１枚のシリコンウェハーから作られるプロセッサーダイが増えると製品あたりのコストが低減するためである。 (ja) O termo die shrink (às vezes chamado de optical shrink ou process shrink) refere-se simplesmente à miniaturização dos dispositivos semicondutores, principalmente os transistores. O ato de encolher um die é criar um circuito aparentemente idêntico utilizando um processo de fabricação avançado, geralmente envolvendo um processo de nó litográfico. Isto reduz os custos globais de uma companhia de chip - como a ausência de grandes alterações na arquitetura do processador, diminuindo custos de pesquisa e desenvolvimento – enquanto que ao mesmo tempo permite que mais microcircuitos sejam construídos no mesmo wafer de silício, o que resulta num menor custo por produto vendido. (pt) Mit Shrinking (von engl. shrink: schrumpfen, schwinden, auch Die-Shrink) bezeichnet man in der Elektronik das Skalieren (hier: Verkleinern) eines Chip-Modells durch verfeinerte Leiterstrukturen. Verkleinert man bei einem Chip die Strukturbreite beispielsweise von 90 nm auf 65 nm, so benötigt man weniger Betriebsspannung, um den Chip bei gleicher Verarbeitungsgeschwindigkeit zu betreiben. Damit wird auch die Verlustleistung gesenkt, was höhere Arbeitsfrequenzen bei gleicher Chip-Kühlung ermöglicht. Ein weiteres Hauptaugenmerk bei der Verkleinerung der Strukturen liegt bei der Erhöhung der Anzahl der Dies pro Wafer, um die Produktionskosten zu senken. Alternativ können auf gleich großen Dies nach einem Shrink mehr Transistoren untergebracht werden, mit denen sich mehr Cores oder größere Cach (de) Il termine "Die shrink" (conosciuto anche come Optical shrink) è utilizzato in elettronica e più precisamente nei processi di produzione dei circuiti integrati per indicare un semplice "ridimensionamento" del componente. Il Die shrink definisce in sintesi la dimensione del singolo transistor, l'elemento base del circuito integrato. (it)
rdfs:seeAlso	Transistor count
dcterms:subject	Integrated circuits Semiconductors
Wikipage page ID	14001145 (xsd:integer)
Wikipage revision ID	1117796886 (xsd:integer)
Link from a Wikipage to another Wikipage	Samsung Electronics Microlithography Metal-oxide-semiconductor List of Intel Core i5 microprocessors Lithography Penryn (microarchitecture) Pentium 4 Integrated circuit International Technology Roadmap for Semiconductors List of semiconductor scale examples 10 nm MediaTek SK Hynix Emotion Engine Moore's law Clock rate Microarchitecture Tick-Tock model Toshiba 250 nanometer ATI Technologies Advanced Micro Devices Fabless Flash memory Central processing unit Die (integrated circuit) Graphics processing unit Semiconductor device fabrication Integrated circuits Athlon 64 X2 Semiconductors TSMC Photolithography Business model CMOS PlayStation 2 Sony Clarkdale (microprocessor) Fabrication process Intel Intel Core Nehalem (microarchitecture) Nvidia Random-access memory Semiconductor devices Silicon on insulator System on a chip Semiconductor company Lithographic Transistor count 5 nm 65 nm 90 nm 7 nm Semiconductor node 14 nm Silicon wafer 130 nm 180 nm 32 nm 3 nm 45 nm 22 nm
Link from a Wikipage to an external page	http://www.umc.com/english/process/f.asp

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