About: Rigel (microprocessor)     Goto   Sponge   NotDistinct   Permalink

An Entity of Type : yago:Whole100003553, within Data Space : dbpedia.demo.openlinksw.com associated with source document(s)
QRcode icon
http://dbpedia.demo.openlinksw.com/describe/?url=http%3A%2F%2Fdbpedia.org%2Fresource%2FRigel_%28microprocessor%29&invfp=IFP_OFF&sas=SAME_AS_OFF

Rigel was a microprocessor chip set developed and fabricated by Digital Equipment Corporation (DEC) that implemented the VAX instruction set architecture (ISA). It was introduced on 11 July 1989 with the introduction of the VAX 6000 Model 400, the first system to feature the chip set. Rigel was also used in the VAX 4000 Model 300 and VAXstation 3100 Model 76. Production Rigel CPUs were rated at 35 to 43 MHz. The Rigel chipset consisted of several devices: Support chips for Rigel-based systems included the RSSC (Rigel System Support Chip) and Ghidra, the VAX 4000 system interface chip.

AttributesValues
rdf:type
rdfs:label
  • Rigel (microprocessor) (en)
rdfs:comment
  • Rigel was a microprocessor chip set developed and fabricated by Digital Equipment Corporation (DEC) that implemented the VAX instruction set architecture (ISA). It was introduced on 11 July 1989 with the introduction of the VAX 6000 Model 400, the first system to feature the chip set. Rigel was also used in the VAX 4000 Model 300 and VAXstation 3100 Model 76. Production Rigel CPUs were rated at 35 to 43 MHz. The Rigel chipset consisted of several devices: Support chips for Rigel-based systems included the RSSC (Rigel System Support Chip) and Ghidra, the VAX 4000 system interface chip. (en)
foaf:depiction
  • http://commons.wikimedia.org/wiki/Special:FilePath/DEC_Rigel_CPU_die.jpg
  • http://commons.wikimedia.org/wiki/Special:FilePath/DEC_Rigel_Cache_Controller_die.jpg
  • http://commons.wikimedia.org/wiki/Special:FilePath/DEC_Rigel_FPA_die.jpg
dcterms:subject
Wikipage page ID
Wikipage revision ID
Link from a Wikipage to another Wikipage
Link from a Wikipage to an external page
sameAs
dbp:wikiPageUsesTemplate
thumbnail
has abstract
  • Rigel was a microprocessor chip set developed and fabricated by Digital Equipment Corporation (DEC) that implemented the VAX instruction set architecture (ISA). It was introduced on 11 July 1989 with the introduction of the VAX 6000 Model 400, the first system to feature the chip set. Rigel was also used in the VAX 4000 Model 300 and VAXstation 3100 Model 76. Production Rigel CPUs were rated at 35 to 43 MHz. The Rigel chipset consisted of several devices: * REX520 central processing unit (also known as the DC520 or "P-chip") * DC523 floating-point unit (codenamed KIWI or "F-chip" during development) * DC592 cache controller (codenamed COW or "C-chip" during development) * DC521 clock chip In addition, two further devices implemented the VAX vector processor option; these comprised the DC555 Vector Register set chip (VERSE) and the DC556 Vector Data Path chip (FAVOR). Support chips for Rigel-based systems included the RSSC (Rigel System Support Chip) and Ghidra, the VAX 4000 system interface chip. (en)
gold:hypernym
prov:wasDerivedFrom
page length (characters) of wiki page
foaf:isPrimaryTopicOf
is Link from a Wikipage to another Wikipage of
is Wikipage redirect of
is Wikipage disambiguates of
is foaf:primaryTopic of
Faceted Search & Find service v1.17_git139 as of Feb 29 2024


Alternative Linked Data Documents: ODE     Content Formats:   [cxml] [csv]     RDF   [text] [turtle] [ld+json] [rdf+json] [rdf+xml]     ODATA   [atom+xml] [odata+json]     Microdata   [microdata+json] [html]    About   
This material is Open Knowledge   W3C Semantic Web Technology [RDF Data] Valid XHTML + RDFa
OpenLink Virtuoso version 08.03.3330 as of Mar 19 2024, on Linux (x86_64-generic-linux-glibc212), Single-Server Edition (378 GB total memory, 60 GB memory in use)
Data on this page belongs to its respective rights holders.
Virtuoso Faceted Browser Copyright © 2009-2024 OpenLink Software