About: Simple programmable logic device

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A simple programmable logic device (SPLD) is a programmable logic device with complexity below that of a complex programmable logic device (CPLD). The term commonly refers to devices such as ROMs, PALs, PLAs and GALs.

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rdf:type	yago:Abstraction100002137 yago:Arrangement107938773 yago:Array107939382 yago:Cognition100023271 yago:Component105868954 yago:Concept105835747 yago:Content105809192 yago:Group100031264 yago:Idea105833840 yago:Part105867413 yago:PsychologicalFeature100023100 yago:WikicatGateArrays device yago:WikicatElectricalComponents
rdfs:label	Simple Programmable Logic Device (it) Simple programmable logic device (en) SPLD (pl)
rdfs:comment	A simple programmable logic device (SPLD) is a programmable logic device with complexity below that of a complex programmable logic device (CPLD). The term commonly refers to devices such as ROMs, PALs, PLAs and GALs. (en) SPLD (ang. Simple Programmable Logic Device) – grupa prostych programowalnych układów elektronicznych pierwszej generacji. W jej skład wchodzą układy PLE, PAL, PLA oraz GAL. Z powodu stosunkowo ograniczonych możliwości logicznych służyły głównie jako układy zastępujące klasyczne obwody logiczne, budowane z wykorzystaniem układów scalonych w technologii TTL lub CMOS. (pl) Ul Simple Programmable Logic Device ("Dispositivo a Logica Programmabile semplice" in inglese, solitamente abbreviato in SPLD), In elettronica digitale, è un dispositivo programmable logic device, programmabile e cancellabile, con un numero di pin inferiore di 48. Si tratta di un dispositivo di complessità inferiore rispetto al complex programmable logic device, contenente più di 48 pin, e comprendente molte delle ROM, PLA e GAL. (it)
dcterms:subject	Gate arrays
Wikipage page ID	12403972 (xsd:integer)
Wikipage revision ID	1069356006 (xsd:integer)
Link from a Wikipage to another Wikipage	Read-only memory Generic array logic Programmable array logic Complex programmable logic device Programmable logic array Programmable logic device EEPROM EPROM Flash memory Gate arrays Boolean algebra
Link from a Wikipage to an external page	https://www.safaribooksonline.com/library/view/introduction-to-digital/9780470900550/chap1-sec007.html
sameAs	Simple programmable logic device Simple programmable logic device Simple programmable logic device Simple programmable logic device Simple programmable logic device Simple programmable logic device
dbp:wikiPageUsesTemplate	dbt:Moreref dbt:Cite_book dbt:Mergefrom
has abstract	A simple programmable logic device (SPLD) is a programmable logic device with complexity below that of a complex programmable logic device (CPLD). The term commonly refers to devices such as ROMs, PALs, PLAs and GALs. (en) SPLD (ang. Simple Programmable Logic Device) – grupa prostych programowalnych układów elektronicznych pierwszej generacji. W jej skład wchodzą układy PLE, PAL, PLA oraz GAL. Z powodu stosunkowo ograniczonych możliwości logicznych służyły głównie jako układy zastępujące klasyczne obwody logiczne, budowane z wykorzystaniem układów scalonych w technologii TTL lub CMOS. (pl) Ul Simple Programmable Logic Device ("Dispositivo a Logica Programmabile semplice" in inglese, solitamente abbreviato in SPLD), In elettronica digitale, è un dispositivo programmable logic device, programmabile e cancellabile, con un numero di pin inferiore di 48. Si tratta di un dispositivo di complessità inferiore rispetto al complex programmable logic device, contenente più di 48 pin, e comprendente molte delle ROM, PLA e GAL. (it)
gold:hypernym	Device
prov:wasDerivedFrom	wikipedia-en:Simple_programmable_logic_device?oldid=1069356006&ns=0
page length (characters) of wiki page	2687 (xsd:nonNegativeInteger)
foaf:isPrimaryTopicOf	wikipedia-en:Simple_programmable_logic_device
is Link from a Wikipage to another Wikipage of	SPLD Complex programmable logic device Programmable logic device Lattice Semiconductor Outline of electronics
is Wikipage redirect of	SPLD
is foaf:primaryTopic of	wikipedia-en:Simple_programmable_logic_device

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