About: Bit Rate Reduction

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Bit Rate Reduction, or BRR, also called Bit Rate Reduced, is a name given toan audio compression method used on the SPC700 sound coprocessor used in the SNES, as well as the audio processors of the Philips CD-i, the PlayStation, and the Apple Macintosh Quadra series. The method is a form of ADPCM.

Attributes	Values
rdfs:label	Bit Rate Reduction (en)
rdfs:comment	Bit Rate Reduction, or BRR, also called Bit Rate Reduced, is a name given toan audio compression method used on the SPC700 sound coprocessor used in the SNES, as well as the audio processors of the Philips CD-i, the PlayStation, and the Apple Macintosh Quadra series. The method is a form of ADPCM. (en)
dcterms:subject	Digital audio Super Nintendo Entertainment System
Wikipage page ID	5398653 (xsd:integer)
Wikipage revision ID	1050165437 (xsd:integer)
Link from a Wikipage to another Wikipage	Audio data compression Infinite impulse response Philips CD-i Pulse-code modulation Endianness Apple Inc. Byte Linear prediction ADPCM Digital audio Macintosh Quadra Super Nintendo Entertainment System Super Nintendo Entertainment System CD-ROM PlayStation (console) SPC700 Fixed-point arithmetic Green Book (CD standard)
Link from a Wikipage to an external page	http://emureview.ztnet.com/developerscorner/SoundCPU/spc.htm
sameAs	Bit Rate Reduction Bit Rate Reduction Bit Rate Reduction
dbp:wikiPageUsesTemplate	dbt:About dbt:Reflist
has abstract	Bit Rate Reduction, or BRR, also called Bit Rate Reduced, is a name given toan audio compression method used on the SPC700 sound coprocessor used in the SNES, as well as the audio processors of the Philips CD-i, the PlayStation, and the Apple Macintosh Quadra series. The method is a form of ADPCM. BRR compresses each consecutive sequence of sixteen 16-bit PCM samples into a block of 9 bytes. From most to least significant, the first byte of each block consists of four bits indicating the range of the block (see below) which controls the size of steps between the 16 possible values such that minute changes can be recorded if the 16 values are closer together but minute changes are lost if the 16 values are far apart, two bits indicating the filter (see below), and two bits of control information for the SPC700. The remaining eight bytes consist of 16 signed 4-bit nibbles which correspond to the 16 samples, packed in a big-endian manner. As 32 bytes of input become 9 bytes of output, the BRR algorithm yields a 3.56:1 compression ratio. (en)
gold:hypernym	Name
prov:wasDerivedFrom	wikipedia-en:Bit_Rate_Reduction?oldid=1050165437&ns=0
page length (characters) of wiki page	4705 (xsd:nonNegativeInteger)
foaf:isPrimaryTopicOf	wikipedia-en:Bit_Rate_Reduction
is Link from a Wikipage to another Wikipage of	BRR Bit rate reduction Reduction List of sound chips
is Wikipage disambiguates of	BRR Bit rate reduction Reduction
is foaf:primaryTopic of	wikipedia-en:Bit_Rate_Reduction

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