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Examples of coherency protocols for cache memory are listed here. For simplicity, all "miss" Read and Write status transactions which obviously come from state "I" (or miss of Tag), in the diagrams are not shown. They are shown directly on the new state. Many of the following protocols have only historical value. At the moment the main protocols used are the R-MESI type / MESIF protocols and the HRT-ST-MESI (MOESI type) or a subset or an extension of these.

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  • Cache coherency protocols (examples) (en)
  • Protocolli di coerenza della cache (esempi) (it)
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  • Examples of coherency protocols for cache memory are listed here. For simplicity, all "miss" Read and Write status transactions which obviously come from state "I" (or miss of Tag), in the diagrams are not shown. They are shown directly on the new state. Many of the following protocols have only historical value. At the moment the main protocols used are the R-MESI type / MESIF protocols and the HRT-ST-MESI (MOESI type) or a subset or an extension of these. (en)
  • Vengono qui elencati esempi dei protocolli di coerenza per la memoria cache. Per semplicità tutte le transazioni di stato di Read e Write "miss" che ovviamente provengono dallo stato I (o miss di Tag), nei diagrammi non sono mostrate. Sono mostrate direttamente sul nuovo stato. Molti dei seguenti protocolli hanno solo valore storico. Al momento i principali protocolli usati sono i protocolli (tipo ) e il (tipo ) o un sottoinsieme o un'estensione di questi. (it)
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  • http://commons.wikimedia.org/wiki/Special:FilePath/SMP_-_Symmetric_Multiprocessor_System.svg
  • http://commons.wikimedia.org/wiki/Special:FilePath/Berkeley_Protocol_-_State_Transaction_Diagram.svg
  • http://commons.wikimedia.org/wiki/Special:FilePath/Bull_HN_ISI_State_Transaction_Diagram.svg
  • http://commons.wikimedia.org/wiki/Special:FilePath/Dragon_Protocol_-_State_Transaction_Diagram.svg
  • http://commons.wikimedia.org/wiki/Special:FilePath/Firefly_Protocol_-_State_Transaction_Diagram.svg
  • http://commons.wikimedia.org/wiki/Special:FilePath/HRT-ST-MESI_Protocol_-_State_Transaction_Diagram.svg
  • http://commons.wikimedia.org/wiki/Special:FilePath/Illinois_State_Transaction_Diagram.svg
  • http://commons.wikimedia.org/wiki/Special:FilePath/MERSI-MESIF_Protocol_-_State_Transaction_Diagram.svg
  • http://commons.wikimedia.org/wiki/Special:FilePath/MESI_State_Transaction_Diagram.svg
  • http://commons.wikimedia.org/wiki/Special:FilePath/MOESI_State_Transaction_Diagram.svg
  • http://commons.wikimedia.org/wiki/Special:FilePath/RT-MESI_Protocol_-_State_Transaction_Diagram.svg
  • http://commons.wikimedia.org/wiki/Special:FilePath/Synapse_Protocol_-_State_Transaction_Diagram.svg
  • http://commons.wikimedia.org/wiki/Special:FilePath/Write-Once_State_Transaction_Diagram.svg
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  • Examples of coherency protocols for cache memory are listed here. For simplicity, all "miss" Read and Write status transactions which obviously come from state "I" (or miss of Tag), in the diagrams are not shown. They are shown directly on the new state. Many of the following protocols have only historical value. At the moment the main protocols used are the R-MESI type / MESIF protocols and the HRT-ST-MESI (MOESI type) or a subset or an extension of these. (en)
  • Vengono qui elencati esempi dei protocolli di coerenza per la memoria cache. Per semplicità tutte le transazioni di stato di Read e Write "miss" che ovviamente provengono dallo stato I (o miss di Tag), nei diagrammi non sono mostrate. Sono mostrate direttamente sul nuovo stato. Molti dei seguenti protocolli hanno solo valore storico. Al momento i principali protocolli usati sono i protocolli (tipo ) e il (tipo ) o un sottoinsieme o un'estensione di questi. (it)
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