About: Communications Processor Module

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Communications Processor Module (CPM) is a component of Motorola 68000 family (QUICC) or Motorola/Freescale Semiconductor PowerPC/Power ISA (PowerQUICC) microprocessors designed to provide features related to imaging and communications. A microprocessor can delegate most of the input/output processing (for example sending and receiving data via the serial interface) to the Communications Processor Module and the microprocessor does not have to perform those functions itself. Some input/output functions require quick response from the processor, for example due to precise timing requirements during data transmission. With CPM performing those operations, the main microprocessor is free to perform other tasks.

Attributes	Values
rdf:type	yago:WikicatMotorolaMicroprocessors yago:Artifact100021939 yago:Chip103020034 yago:Conductor103088707 yago:Device103183080 yago:Instrumentality103575240 yago:Microprocessor103760310 yago:Object100002684 yago:PhysicalEntity100001930 military unit yago:SemiconductorDevice104171831 yago:Whole100003553 yago:WikicatPowerPCMicroprocessors
rdfs:label	Communications Processor Module (en)
rdfs:comment	Communications Processor Module (CPM) is a component of Motorola 68000 family (QUICC) or Motorola/Freescale Semiconductor PowerPC/Power ISA (PowerQUICC) microprocessors designed to provide features related to imaging and communications. A microprocessor can delegate most of the input/output processing (for example sending and receiving data via the serial interface) to the Communications Processor Module and the microprocessor does not have to perform those functions itself. Some input/output functions require quick response from the processor, for example due to precise timing requirements during data transmission. With CPM performing those operations, the main microprocessor is free to perform other tasks. (en)
dcterms:subject	Freescale Semiconductor Motorola microprocessors PowerPC microprocessors
Wikipage page ID	34212377 (xsd:integer)
Wikipage revision ID	1004042926 (xsd:integer)
Link from a Wikipage to another Wikipage	PowerPC Power ISA QUICC Universal Serial Bus Input/output PowerQUICC Freescale Semiconductor Signaling System 7 Freescale Semiconductor Motorola microprocessors Synchronization in telecommunications Time-division multiplexing Microcode Central Processing Unit Dual-ported RAM PowerPC microprocessors Direct memory access Interrupt I²C IP core Freescale 683XX ISDN Medium access control Serial Communication Controller Serial Peripheral Interface Bus IEEE 1284 Read-only Memory Motorola 68040 RISC Symbol rate Motorola 68000 family Interrupt controller
Link from a Wikipage to an external page	https://www.nxp.com/docs/en/application-note/AN2050.pdf https://www.nxp.com/docs/en/application-note/AN2045.pdf https://www.nxp.com/docs/en/reference-manual/MC68360UM.pdf https://www.nxp.com/docs/en/reference-manual/MPC823UM.pdf
sameAs	Communications Processor Module Communications Processor Module Communications Processor Module Communications Processor Module
dbp:wikiPageUsesTemplate	dbt:NXP_Semiconductors dbt:Reflist dbt:POWER,_PowerPC,_and_Power_ISA
has abstract	Communications Processor Module (CPM) is a component of Motorola 68000 family (QUICC) or Motorola/Freescale Semiconductor PowerPC/Power ISA (PowerQUICC) microprocessors designed to provide features related to imaging and communications. A microprocessor can delegate most of the input/output processing (for example sending and receiving data via the serial interface) to the Communications Processor Module and the microprocessor does not have to perform those functions itself. Some input/output functions require quick response from the processor, for example due to precise timing requirements during data transmission. With CPM performing those operations, the main microprocessor is free to perform other tasks. The CPM features its own RISC microcontroller (Communication Processor), separate from the actual Central Processing Unit IP core. The RISC microcontroller communicates with the core using dual-ported RAM, special command, configuration and event registers as well as via interrupts. Motorola 68302 Integrated Multiprotocol Processor featured a RISC processor controlled either by a microcode in ROM or by downloadable firmware. Various forms of microcode were shipped for different applications, for example to support Signaling System 7 communications or Centronics parallel interface. Motorola 68360 QUICC was the first design to feature Communications Processor Module, offering microcode for SS7 and ISDN applications. Specifications of the microcontroller programming interface were generally not shipped to customers. It was possible to run 68360 in slave mode and to use only CPM part of the chip, for example in the M68360QUADS-040 board, where 68040 CPU (master) is coupled with 68360 CPM (slave), with CPU of 68360 processor being disabled. CPM was used later in the PowerQUICC series of PowerPC- and Power ISA-based processors. Early designs, like MPC860, used virtually the same CPM as the previous 68360 QUICC processors. Typical features of the CPM include: * Medium access control (MAC), * Communication interfaces with serial communication controllers (SCC), serial management controllers (SMC), Universal Serial Bus, I²C and Serial Peripheral Interface Bus attachment, * Direct memory access (DMA) circuitry, interrupt controller, time-slot assigner and baud rate generators. (en)
gold:hypernym	Component
prov:wasDerivedFrom	wikipedia-en:Communications_Processor_Module?oldid=1004042926&ns=0
page length (characters) of wiki page	4318 (xsd:nonNegativeInteger)
foaf:isPrimaryTopicOf	wikipedia-en:Communications_Processor_Module
is Link from a Wikipage to another Wikipage of	PowerQUICC CPM Communication Processor Module
is Wikipage redirect of	Communication Processor Module
is Wikipage disambiguates of	CPM
is foaf:primaryTopic of	wikipedia-en:Communications_Processor_Module

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