About: Fast interrupt request

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Fast interrupt request (FIQ) is a specialized type of interrupt request, which is a standard technique used in computer CPUs to deal with events that need to be processed as they occur, such as receiving data from a network card, or keyboard or mouse actions. FIQs are specific to the ARM architecture, which supports two types of interrupts; FIQs for fast, low-latency interrupt handling, and standard interrupt requests (IRQs), for more general interrupts.

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rdfs:label	Fast interrupt request (en)
rdfs:comment	Fast interrupt request (FIQ) is a specialized type of interrupt request, which is a standard technique used in computer CPUs to deal with events that need to be processed as they occur, such as receiving data from a network card, or keyboard or mouse actions. FIQs are specific to the ARM architecture, which supports two types of interrupts; FIQs for fast, low-latency interrupt handling, and standard interrupt requests (IRQs), for more general interrupts. (en)
dct:subject	Interrupts
Wikipage page ID	41896815 (xsd:integer)
Wikipage revision ID	1106150503 (xsd:integer)
Link from a Wikipage to another Wikipage	Context switch ARM architecture Interrupts LWN.net Interrupt request
Link from a Wikipage to an external page	https://lwn.net/Articles/600359/
sameAs	Fast interrupt request Fast interrupt request Fast interrupt request Fast interrupt request
dbp:wikiPageUsesTemplate	dbt:Reflist dbt:Short_description dbt:Compu-stub
has abstract	Fast interrupt request (FIQ) is a specialized type of interrupt request, which is a standard technique used in computer CPUs to deal with events that need to be processed as they occur, such as receiving data from a network card, or keyboard or mouse actions. FIQs are specific to the ARM architecture, which supports two types of interrupts; FIQs for fast, low-latency interrupt handling, and standard interrupt requests (IRQs), for more general interrupts. An FIQ takes priority over an IRQ in an ARM system. Also, only one FIQ source at a time is supported. This helps reduce interrupt latency as the interrupt service routine can be executed directly without determining the source of the interrupt. A context save is not required for servicing an FIQ since it has its own set of banked registers. This reduces the overhead of context switching. (en)
gold:hypernym	Type
prov:wasDerivedFrom	wikipedia-en:Fast_interrupt_request?oldid=1106150503&ns=0
page length (characters) of wiki page	1646 (xsd:nonNegativeInteger)
foaf:isPrimaryTopicOf	wikipedia-en:Fast_interrupt_request
is Link from a Wikipage to another Wikipage of	ARM architecture family Fiq Register file
is foaf:primaryTopic of	wikipedia-en:Fast_interrupt_request

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