About: Memory divider

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A memory divider is a ratio which is used to determine the operating clock frequency of computer memory in accordance with front side bus (FSB) frequency, if the memory system is dependent on FSB clock speed. Along with memory latency timings, memory dividers are extensively used in overclocking memory subsystems to find stable, working memory states at higher FSB frequencies. The ratio between DRAM and FSB is commonly referred to as "DRAM:FSB ratio".

Attributes	Values
rdfs:label	Memory divider (en)
rdfs:comment	A memory divider is a ratio which is used to determine the operating clock frequency of computer memory in accordance with front side bus (FSB) frequency, if the memory system is dependent on FSB clock speed. Along with memory latency timings, memory dividers are extensively used in overclocking memory subsystems to find stable, working memory states at higher FSB frequencies. The ratio between DRAM and FSB is commonly referred to as "DRAM:FSB ratio". (en)
dcterms:subject	Clock signal Computer hardware tuning
Wikipage page ID	14693570 (xsd:integer)
Wikipage revision ID	1092333179 (xsd:integer)
Link from a Wikipage to another Wikipage	Memory latency Overclocking Frequency Front Side Bus Chipset Computer memory CPU multiplier DDR2 SDRAM DDR3 SDRAM DDR SDRAM DRAM Clock signal Computer hardware tuning Motherboard NVidia Memory Controller Front side bus
Link from a Wikipage to an external page	http://www.pcstats.com/articleview.cfm%3Farticleid=1804&page=2 https://archive.today/20130125144410/http:/www.howtofixcomputers.com/bb/ftopic137216.html
sameAs	Memory divider Memory divider Memory divider
dbp:wikiPageUsesTemplate	dbt:Refimprove dbt:Short_description
has abstract	A memory divider is a ratio which is used to determine the operating clock frequency of computer memory in accordance with front side bus (FSB) frequency, if the memory system is dependent on FSB clock speed. Along with memory latency timings, memory dividers are extensively used in overclocking memory subsystems to find stable, working memory states at higher FSB frequencies. The ratio between DRAM and FSB is commonly referred to as "DRAM:FSB ratio". Memory dividers are only applicable to those chipsets in which memory speed is dependent on FSB speeds. Certain chipsets like nVidia 680i have separate memory and FSB lanes due to which memory clock and FSB clock are asynchronous and memory dividers are not used there. Setting memory speeds and overclocking memory systems in such chipsets are different issues which do not use memory dividers. This article is only applicable to those chipsets in which the memory clock is dependent on FSB clock. (en)
gold:hypernym	Ratio
prov:wasDerivedFrom	wikipedia-en:Memory_divider?oldid=1092333179&ns=0
page length (characters) of wiki page	5068 (xsd:nonNegativeInteger)
foaf:isPrimaryTopicOf	wikipedia-en:Memory_divider
is rdfs:seeAlso of	Front-side bus
is Link from a Wikipage to another Wikipage of	MOS Technology 6502 CPU multiplier DRAM:FSB Ratio DRAM:FSB ratio Memory Divider
is Wikipage redirect of	DRAM:FSB Ratio DRAM:FSB ratio Memory Divider
is foaf:primaryTopic of	wikipedia-en:Memory_divider

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