About: TLS acceleration

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TLS acceleration (formerly known as SSL acceleration) is a method of offloading processor-intensive public-key encryption for Transport Layer Security (TLS) and its predecessor Secure Sockets Layer (SSL) to a hardware accelerator. Typically this means having a separate card that plugs into a PCI slot in a computer that contains one or more coprocessors able to handle much of the SSL processing. TLS accelerators may use off-the-shelf CPUs, but most use custom ASICs and RISC chips to do most of the difficult computational work.

Attributes	Values
rdfs:label	TLS acceleration (en) SSL加速 (zh)
rdfs:comment	TLS acceleration (formerly known as SSL acceleration) is a method of offloading processor-intensive public-key encryption for Transport Layer Security (TLS) and its predecessor Secure Sockets Layer (SSL) to a hardware accelerator. Typically this means having a separate card that plugs into a PCI slot in a computer that contains one or more coprocessors able to handle much of the SSL processing. TLS accelerators may use off-the-shelf CPUs, but most use custom ASICs and RISC chips to do most of the difficult computational work. (en) SSL加速是一种减轻中央处理器过多参与传输层安全协议（TLS）的公开密钥加密所产生负担的方法，它的前身是安全套接层（SSL）的硬件加速器。通常来说，这是一种PCI介面的擴充卡，其中包括一个或多个處理大量SSL計算的輔助處理器。 SSL加速器可以使用现成的CPU，也可以使用ASIC和RISC板卡来完成最艰难的计算工作。 (zh)
foaf:depiction
dcterms:subject	Hardware acceleration Computer optimization Transport Layer Security Cryptographic hardware
Wikipage page ID	1277346 (xsd:integer)
Wikipage revision ID	1084722331 (xsd:integer)
Link from a Wikipage to another Wikipage	Application delivery controller Hardware acceleration Symmetric-key algorithm Conventional PCI Cryptographic hash function Coprocessor Stunnel Hardware security module Public-key cryptography Transport Layer Security Data exchange ARM architecture Advanced Encryption Standard Allwinner Technology ASIC AES instruction set Computer optimization Transport Layer Security Cryptographic hardware RSA (cryptosystem) X86 architecture Reverse proxy RISC Pseudo-random number generator Symmetric key algorithm System-on-chip
Link from a Wikipage to an external page	http://www.windowsecurity.com/articles/SSL-Acceleration-Offloading-Security-Implications.html
sameAs	TLS acceleration TLS acceleration TLS acceleration
dbp:wikiPageUsesTemplate	dbt:Reflist dbt:Short_description dbt:Hardware_acceleration
thumbnail	wiki-commons:Special:FilePath/Sun-crypto-accelerator-1000.jpg?width=300
has abstract	TLS acceleration (formerly known as SSL acceleration) is a method of offloading processor-intensive public-key encryption for Transport Layer Security (TLS) and its predecessor Secure Sockets Layer (SSL) to a hardware accelerator. Typically this means having a separate card that plugs into a PCI slot in a computer that contains one or more coprocessors able to handle much of the SSL processing. TLS accelerators may use off-the-shelf CPUs, but most use custom ASICs and RISC chips to do most of the difficult computational work. (en) SSL加速是一种减轻中央处理器过多参与传输层安全协议（TLS）的公开密钥加密所产生负担的方法，它的前身是安全套接层（SSL）的硬件加速器。通常来说，这是一种PCI介面的擴充卡，其中包括一个或多个處理大量SSL計算的輔助處理器。 SSL加速器可以使用现成的CPU，也可以使用ASIC和RISC板卡来完成最艰难的计算工作。 (zh)
prov:wasDerivedFrom	wikipedia-en:TLS_acceleration?oldid=1084722331&ns=0
page length (characters) of wiki page	3388 (xsd:nonNegativeInteger)
foaf:isPrimaryTopicOf	wikipedia-en:TLS_acceleration
is Link from a Wikipage to another Wikipage of	Network Security Services SSL accelerator SSL accelerators Application firewall Coprocessor Load balancing (computing) Hardware acceleration Transport Layer Security Cybersecurity information technology list Accelerator SSL acceleration Secure cryptoprocessor Reverse proxy SSL Acceleration
is Wikipage redirect of	SSL accelerator SSL accelerators SSL acceleration SSL Acceleration
is foaf:primaryTopic of	wikipedia-en:TLS_acceleration

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