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The Western Design Center (WDC) W65C134S is an 8-bit CMOS microcontroller based on a W65C02S processor core, which is a superset of the MOS Technology 6502 processor. The W65C134S consists of a fully static 8-bit W65C02S CPU core, 4 KB of ROM containing a machine language monitor, 192 bytes of SRAM, two 16 bit timers, one 16-bit Watch-Dog Timer (WDT) with "restart" interrupt, one UART with baud rate timer, a low power Serial Interface Bus (SIB) configured as a token passing Local Area Network, twenty-two priority encoded interrupts, two crystal inputs (slow 32.768KHz and fast up to 8-MHz), Bus Control Register (BCR) for external memory bus control, interface circuitry for peripheral devices, and many low power features. The W65C134S has been developed for high-reliability applications, as

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  • WDC 65C134 (es)
  • WDC 65C134 (en)
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  • El microcontrolador W65C134 de Western Design Center (WDC) es una computadora completa de 8 bits totalmente estática fabricada en un solo chip que utiliza un proceso CMOS de baja potencia. El W65C134S complementa una línea establecida y creciente de productos 65xx y tiene una amplia gama de aplicaciones de microcomputadoras. El W65C134S ha sido desarrollado para aplicaciones Hi-Rel y donde se requiere una potencia mínima.​ (es)
  • The Western Design Center (WDC) W65C134S is an 8-bit CMOS microcontroller based on a W65C02S processor core, which is a superset of the MOS Technology 6502 processor. The W65C134S consists of a fully static 8-bit W65C02S CPU core, 4 KB of ROM containing a machine language monitor, 192 bytes of SRAM, two 16 bit timers, one 16-bit Watch-Dog Timer (WDT) with "restart" interrupt, one UART with baud rate timer, a low power Serial Interface Bus (SIB) configured as a token passing Local Area Network, twenty-two priority encoded interrupts, two crystal inputs (slow 32.768KHz and fast up to 8-MHz), Bus Control Register (BCR) for external memory bus control, interface circuitry for peripheral devices, and many low power features. The W65C134S has been developed for high-reliability applications, as (en)
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  • http://commons.wikimedia.org/wiki/Special:FilePath/W65C134S8plg-8_lg.jpg
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  • El microcontrolador W65C134 de Western Design Center (WDC) es una computadora completa de 8 bits totalmente estática fabricada en un solo chip que utiliza un proceso CMOS de baja potencia. El W65C134S complementa una línea establecida y creciente de productos 65xx y tiene una amplia gama de aplicaciones de microcomputadoras. El W65C134S ha sido desarrollado para aplicaciones Hi-Rel y donde se requiere una potencia mínima.​ El W65C134S consta de una unidad de procesamiento central (CPU) W65C02S (estática), 4096 bytes de memoria de solo lectura (ROM), 192 bytes de memoria de acceso aleatorio (RAM), dos temporizadores de 16 bits, un bus de interfaz serie (SIB) de baja potencia. configurado como un token que pasa Red de área local, Receptor y transmisor asíncrono universal (UART) con temporizador de velocidad en baudios, un "Temporizador de vigilancia del perro monitor" de 16 bits con interrupción de "reinicio", veintidós interrupciones codificadas de prioridad, Interfaz ICE, Real -Características del reloj de tiempo que incluyen reloj de hora del día (ToD), registro de control de bus (BCR) para control de bus de memoria externa, circuitos de interfaz para dispositivos periféricos y muchas características de baja potencia. La arquitectura innovadora y el alto rendimiento demostrado de la CPU W65C02S, así como la simplicidad de las instrucciones, dan como resultado la rentabilidad del sistema y una amplia gama de potencia computacional. Estas características hacen que el W65C134S sea un candidato líder para Hi-Rel y otras aplicaciones de microcomputadoras. (es)
  • The Western Design Center (WDC) W65C134S is an 8-bit CMOS microcontroller based on a W65C02S processor core, which is a superset of the MOS Technology 6502 processor. The W65C134S consists of a fully static 8-bit W65C02S CPU core, 4 KB of ROM containing a machine language monitor, 192 bytes of SRAM, two 16 bit timers, one 16-bit Watch-Dog Timer (WDT) with "restart" interrupt, one UART with baud rate timer, a low power Serial Interface Bus (SIB) configured as a token passing Local Area Network, twenty-two priority encoded interrupts, two crystal inputs (slow 32.768KHz and fast up to 8-MHz), Bus Control Register (BCR) for external memory bus control, interface circuitry for peripheral devices, and many low power features. The W65C134S has been developed for high-reliability applications, as well as where minimum power is required. (en)
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