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Transactional Synchronization Extensions Transactional Synchronization Extensions Transactional Synchronization Extensions Transactional Synchronization Extensions
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Die Transactional Synchronization Extensions − New Instructions (TSX−NI oder meistens nur TSX) sind Erweiterungen der x86-Architektur um Transaktionalen Speicher, womit die Ausführung paralleler Software beschleunigt werden kann. Transactional Synchronization Extensions (TSX-NI) è un'estensione all'architettura del set di istruzioni x86 (ISA) che aggiunge il supporto alla hardware, velocizzando l'esecuzione di software multi-threaded attraverso l'elisione della serratura. In base a diversi benchmark, TSX è in grado di fornire circa il 40% di esecuzione più veloce delle applicazioni in specifici carichi di lavoro, e 4-5 volte di più di (TPS). Il supporto per l'emulazione TSX è fornito come parte dell'emulatore di sviluppo software di Intel. C'è anche un supporto sperimentale per l'emulazione TSX in QEMU. Rozszerzenia Synchronizacji Transakcyjnej (TSX) to rozszerzenie architektury x86 o zestaw instrukcji (ISA), które dodaje sprzętowe wsparcie . Ma to na celu przyspieszenie działania programów wielowątkowych, poprzez pominięcie blokad nałożonych na sekcje krytyczne. Według różnych kryteriów oceniania, TSX może zapewnić około 40% szybsze działanie aplikacji przy szczególnych typach obciążeń i 4–5 razy większą liczbę transakcji na sekundę (TPS) w systemach obsługi baz danych . Transactional Synchronization Extensions (TSX), also called Transactional Synchronization Extensions New Instructions (TSX-NI), is an extension to the x86 instruction set architecture (ISA) that adds hardware transactional memory support, speeding up execution of multi-threaded software through lock elision. According to different benchmarks, TSX/TSX-NI can provide around 40% faster applications execution in specific workloads, and 4–5 times more database transactions per second (TPS).
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Die Transactional Synchronization Extensions − New Instructions (TSX−NI oder meistens nur TSX) sind Erweiterungen der x86-Architektur um Transaktionalen Speicher, womit die Ausführung paralleler Software beschleunigt werden kann. Transactional Synchronization Extensions (TSX), also called Transactional Synchronization Extensions New Instructions (TSX-NI), is an extension to the x86 instruction set architecture (ISA) that adds hardware transactional memory support, speeding up execution of multi-threaded software through lock elision. According to different benchmarks, TSX/TSX-NI can provide around 40% faster applications execution in specific workloads, and 4–5 times more database transactions per second (TPS). TSX/TSX-NI was documented by Intel in February 2012, and debuted in June 2013 on selected Intel microprocessors based on the Haswell microarchitecture. Haswell processors below 45xx as well as R-series and K-series (with unlocked multiplier) SKUs do not support TSX/TSX-NI. In August 2014, Intel announced a bug in the TSX/TSX-NI implementation on current steppings of Haswell, Haswell-E, Haswell-EP and early Broadwell CPUs, which resulted in disabling the TSX/TSX-NI feature on affected CPUs via a microcode update. In 2016, a side-channel timing attack was found by abusing the way TSX/TSX-NI handles transactional faults (i.e. page faults) in order to break kernel address space layout randomization (KASLR) on all major operating systems. In 2021, Intel released a microcode update that disabled the TSX/TSX-NI feature on CPU generations from Skylake to Coffee Lake, as a mitigation for discovered security issues. Support for TSX/TSX-NI emulation is provided as part of the Intel Software Development Emulator. There is also experimental support for TSX/TSX-NI emulation in a QEMU fork. Rozszerzenia Synchronizacji Transakcyjnej (TSX) to rozszerzenie architektury x86 o zestaw instrukcji (ISA), które dodaje sprzętowe wsparcie . Ma to na celu przyspieszenie działania programów wielowątkowych, poprzez pominięcie blokad nałożonych na sekcje krytyczne. Według różnych kryteriów oceniania, TSX może zapewnić około 40% szybsze działanie aplikacji przy szczególnych typach obciążeń i 4–5 razy większą liczbę transakcji na sekundę (TPS) w systemach obsługi baz danych . Przedsiębiorstwo Intel opublikowało dokumentację TSX w lutym 2012 roku, a sama technologia zadebiutowała w czerwcu 2013 dla wybranych modeli procesorów przedsiębiorstwa Intel opartych na mikroarchitekturze Haswell. Modele procesorów Haswell o numerach poniżej 45xx, jak i serii R oraz K (z odblokowanym mnożnikiem) nie obsługują TSX. W sierpniu 2014 roku przedsiębiorstwo Intel ogłosiło istnienie błędu w implementacji TSX w modelach serii Haswell, Haswell-E, Haswell-EP i wczesnych modelach procesorów o mikroarchitekturze Broadwell, co doprowadziło do wyłączenia obsługi TSX na wadliwych urządzeniach poprzez aktualizację mikrokodu. Wsparcie emulacji TSX jest częścią programu Intel Software Development Emulator. Istnieje również eksperymentalne wsparcie dla emulacji TSX w wariancie emulatora QEMU. Transactional Synchronization Extensions (TSX-NI) è un'estensione all'architettura del set di istruzioni x86 (ISA) che aggiunge il supporto alla hardware, velocizzando l'esecuzione di software multi-threaded attraverso l'elisione della serratura. In base a diversi benchmark, TSX è in grado di fornire circa il 40% di esecuzione più veloce delle applicazioni in specifici carichi di lavoro, e 4-5 volte di più di (TPS). TSX è stato documentato da Intel nel febbraio 2012, e ha debuttato nel giugno 2013 su microprocessori Intel selezionati basati sulla microarchitettura Haswell. Nei processori Haswell inferiori a 45xx così come le serie R e K (con moltiplicatore sbloccato) non supportano TSX. Nell'agosto 2014, Intel ha annunciato un bug nell'implementazione del TSX sulle attuali ottimizzazioni di Haswell, Haswell-E, Haswell-EP e delle prime cpu Broadwell, che ha portato alla disabilitazione della funzione TSX sulle cpu interessate tramite un aggiornamento del microcodice. Il supporto per l'emulazione TSX è fornito come parte dell'emulatore di sviluppo software di Intel. C'è anche un supporto sperimentale per l'emulazione TSX in QEMU.
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