. . . . . . . . "\u03A4\u03BF \u03C3\u03CD\u03BD\u03BF\u03BB\u03BF \u03B5\u03BD\u03C4\u03BF\u03BB\u03CE\u03BD (instruction set) \u03AE \u03B1\u03C1\u03C7\u03B9\u03C4\u03B5\u03BA\u03C4\u03BF\u03BD\u03B9\u03BA\u03AE \u03C3\u03C5\u03BD\u03CC\u03BB\u03BF\u03C5 \u03B5\u03BD\u03C4\u03BF\u03BB\u03CE\u03BD (instruction set architecture, ISA), \u03B5\u03AF\u03BD\u03B1\u03B9 \u03C4\u03BF \u03C4\u03BC\u03AE\u03BC\u03B1 \u03C4\u03B7\u03C2 \u03B1\u03C1\u03C7\u03B9\u03C4\u03B5\u03BA\u03C4\u03BF\u03BD\u03B9\u03BA\u03AE\u03C2 \u03C5\u03C0\u03BF\u03BB\u03BF\u03B3\u03B9\u03C3\u03C4\u03CE\u03BD \u03C0\u03BF\u03C5 \u03C3\u03C5\u03BD\u03B4\u03AD\u03B5\u03C4\u03B1\u03B9 \u03BC\u03B5 \u03C4\u03BF\u03BD \u03C0\u03C1\u03BF\u03B3\u03C1\u03B1\u03BC\u03BC\u03B1\u03C4\u03B9\u03C3\u03BC\u03CC \u03BA\u03B1\u03B9 \u03C0\u03B5\u03C1\u03B9\u03BB\u03B1\u03BC\u03B2\u03AC\u03BD\u03B5\u03B9 \u03C4\u03BF\u03C5\u03C2 \u03C4\u03CD\u03C0\u03BF\u03C5\u03C2 \u03B4\u03B5\u03B4\u03BF\u03BC\u03AD\u03BD\u03C9\u03BD \u03C4\u03B7\u03C2 \u03BC\u03B7\u03C7\u03B1\u03BD\u03AE\u03C2, \u03C4\u03B9\u03C2 \u03B5\u03BD\u03C4\u03BF\u03BB\u03AD\u03C2, \u03C4\u03BF\u03C5\u03C2 \u03BA\u03B1\u03C4\u03B1\u03C7\u03C9\u03C1\u03B7\u03C4\u03AD\u03C2, \u03C4\u03BF\u03C5\u03C2 \u03C4\u03C1\u03CC\u03C0\u03BF\u03C5\u03C2 \u03B4\u03B9\u03B5\u03C5\u03B8\u03C5\u03BD\u03C3\u03B9\u03BF\u03B4\u03CC\u03C4\u03B7\u03C3\u03B7\u03C2 (addressing modes), \u03C4\u03B7\u03BD , \u03C4\u03BF\u03BD \u03C7\u03B5\u03B9\u03C1\u03B9\u03C3\u03BC\u03CC \u03BA\u03B1\u03B9 \u03B5\u03BE\u03B1\u03B9\u03C1\u03AD\u03C3\u03B5\u03C9\u03BD, \u03BA\u03B1\u03B8\u03CE\u03C2 \u03BA\u03B1\u03B9 \u03C4\u03B7\u03BD \u03B5\u03BE\u03C9\u03C4\u03B5\u03C1\u03B9\u03BA\u03AE \u03B5\u03AF\u03C3\u03BF\u03B4\u03BF/\u03AD\u03BE\u03BF\u03B4\u03BF (Input/output, I/O). \u039C\u03B9\u03B1 \u03B1\u03C1\u03C7\u03B9\u03C4\u03B5\u03BA\u03C4\u03BF\u03BD\u03B9\u03BA\u03AE \u03C3\u03C5\u03BD\u03CC\u03BB\u03BF\u03C5 \u03B5\u03BD\u03C4\u03BF\u03BB\u03CE\u03BD \u03C0\u03B5\u03C1\u03B9\u03BB\u03B1\u03BC\u03B2\u03AC\u03BD\u03B5\u03B9 \u03C4\u03BF \u03C3\u03CD\u03BD\u03BF\u03BB\u03BF \u03C4\u03C9\u03BD \u03BC\u03BD\u03B7\u03BC\u03BF\u03BD\u03B9\u03BA\u03CE\u03BD \u03B5\u03BD\u03C4\u03BF\u03BB\u03CE\u03BD (opcodes) \u03C4\u03B7\u03C2 \u03B3\u03BB\u03CE\u03C3\u03C3\u03B1\u03C2 \u03BC\u03B7\u03C7\u03B1\u03BD\u03AE\u03C2, \u03BA\u03B1\u03B9 \u03C4\u03B9\u03C2 \u03B5\u03BD\u03C4\u03BF\u03BB\u03AD\u03C2 \u03C0\u03BF\u03C5 \u03C5\u03BB\u03BF\u03C0\u03BF\u03B9\u03BF\u03CD\u03BD\u03C4\u03B1\u03B9 \u03B1\u03C0\u03CC \u03C4\u03BF\u03BD \u03AF\u03B4\u03B9\u03BF \u03C4\u03BF\u03BD \u03B5\u03C0\u03B5\u03BE\u03B5\u03C1\u03B3\u03B1\u03C3\u03C4\u03AE. \u0397 \u03B1\u03C1\u03C7\u03B9\u03C4\u03B5\u03BA\u03C4\u03BF\u03BD\u03B9\u03BA\u03AE \u03C3\u03C5\u03BD\u03CC\u03BB\u03BF\u03C5 \u03B5\u03BD\u03C4\u03BF\u03BB\u03CE\u03BD \u03B4\u03B9\u03B1\u03C6\u03AD\u03C1\u03B5\u03B9 \u03B1\u03C0\u03CC \u03C4\u03B7 \u03BC\u03B9\u03BA\u03C1\u03BF\u03B1\u03C1\u03C7\u03B9\u03C4\u03B5\u03BA\u03C4\u03BF\u03BD\u03B9\u03BA\u03AE, \u03B7 \u03BF\u03C0\u03BF\u03AF\u03B1 \u03B5\u03AF\u03BD\u03B1\u03B9 \u03C4\u03BF \u03C3\u03CD\u03BD\u03BF\u03BB\u03BF \u03C4\u03C9\u03BD \u03C4\u03B5\u03C7\u03BD\u03B9\u03BA\u03CE\u03BD \u03C3\u03C7\u03B5\u03B4\u03AF\u03B1\u03C3\u03B7\u03C2 \u03B5\u03C0\u03B5\u03BE\u03B5\u03C1\u03B3\u03B1\u03C3\u03C4\u03CE\u03BD, \u03C0\u03BF\u03C5 \u03C7\u03C1\u03B7\u03C3\u03B9\u03BC\u03BF\u03C0\u03BF\u03B9\u03B5\u03AF\u03C4\u03B1\u03B9 \u03B3\u03B9\u03B1 \u03C4\u03B7\u03BD \u03C5\u03BB\u03BF\u03C0\u03BF\u03AF\u03B7\u03C3\u03B7 \u03C4\u03BF\u03C5 \u03C3\u03C5\u03BD\u03CC\u03BB\u03BF\u03C5 \u03B5\u03BD\u03C4\u03BF\u03BB\u03CE\u03BD. \u03A5\u03C0\u03BF\u03BB\u03BF\u03B3\u03B9\u03C3\u03C4\u03AD\u03C2 \u03BC\u03B5 \u03B4\u03B9\u03B1\u03C6\u03BF\u03C1\u03B5\u03C4\u03B9\u03BA\u03AD\u03C2 \u03BC\u03B9\u03BA\u03C1\u03BF\u03B1\u03C1\u03C7\u03B9\u03C4\u03B5\u03BA\u03C4\u03BF\u03BD\u03B9\u03BA\u03AD\u03C2 \u03BC\u03C0\u03BF\u03C1\u03BF\u03CD\u03BD \u03BD\u03B1 \u03AD\u03C7\u03BF\u03C5\u03BD \u03C4\u03BF \u03AF\u03B4\u03B9\u03BF \u03C3\u03CD\u03BD\u03BF\u03BB\u03BF \u03B5\u03BD\u03C4\u03BF\u03BB\u03CE\u03BD. \u0393\u03B9\u03B1 \u03C0\u03B1\u03C1\u03AC\u03B4\u03B5\u03B9\u03B3\u03BC\u03B1, \u03BF Pentium \u03C4\u03B7\u03C2 Intel \u03BA\u03B1\u03B9 \u03BF \u03C4\u03B7\u03C2 AMD \u03C5\u03BB\u03BF\u03C0\u03BF\u03B9\u03BF\u03CD\u03BD \u03C3\u03C7\u03B5\u03B4\u03CC\u03BD \u03AF\u03B4\u03B9\u03B5\u03C2 \u03B5\u03BA\u03B4\u03CC\u03C3\u03B5\u03B9\u03C2 \u03C4\u03BF\u03C5 \u03C3\u03C5\u03BD\u03CC\u03BB\u03BF\u03C5 \u03B5\u03BD\u03C4\u03BF\u03BB\u03CE\u03BD x86, \u03B1\u03BB\u03BB\u03AC \u03AD\u03C7\u03BF\u03C5\u03BD \u03C3\u03B7\u03BC\u03B1\u03BD\u03C4\u03B9\u03BA\u03AC \u03B4\u03B9\u03B1\u03C6\u03BF\u03C1\u03B5\u03C4\u03B9\u03BA\u03AD\u03C2 \u03B5\u03C3\u03C9\u03C4\u03B5\u03C1\u03B9\u03BA\u03AD\u03C2 \u03C3\u03C7\u03B5\u03B4\u03B9\u03AC\u03C3\u03B5\u03B9\u03C2. \u0397 \u03B1\u03C1\u03C7\u03B9\u03C4\u03B5\u03BA\u03C4\u03BF\u03BD\u03B9\u03BA\u03AE \u03C3\u03C5\u03BD\u03CC\u03BB\u03BF\u03C5 \u03B5\u03BD\u03C4\u03BF\u03BB\u03CE\u03BD IA32 \u03C3\u03C7\u03B5\u03B4\u03B9\u03AC\u03C3\u03C4\u03B7\u03BA\u03B5 \u03B1\u03C0\u03CC \u03C4\u03B7\u03BD \u03B5\u03C4\u03B1\u03B9\u03C1\u03AF\u03B1 Intel \u03B3\u03B9\u03B1 \u03C4\u03BF\u03C5 \u03B5\u03C0\u03B5\u03BE\u03B5\u03C1\u03B3\u03B1\u03C3\u03C4\u03AD\u03C2 \u03C4\u03B7\u03C2 \u03AF\u03B4\u03B9\u03B1\u03C2 \u03B5\u03C4\u03B1\u03B9\u03C1\u03AF\u03B1\u03C2. \u0397 \u03B1\u03BD\u03C4\u03B1\u03B3\u03C9\u03BD\u03B9\u03C3\u03C4\u03B9\u03BA\u03AE \u03B5\u03C4\u03B1\u03B9\u03C1\u03AF\u03B1 AMD \u03C5\u03BB\u03BF\u03C0\u03BF\u03AF\u03B7\u03C3\u03B5 \u03B5\u03C0\u03B5\u03BE\u03B5\u03C1\u03B3\u03B1\u03C3\u03C4\u03AD\u03C2 \u03B4\u03B9\u03B1\u03C6\u03BF\u03C1\u03B5\u03C4\u03B9\u03BA\u03AE\u03C2 \u03B1\u03C1\u03C7\u03B9\u03C4\u03B5\u03BA\u03C4\u03BF\u03BD\u03B9\u03BA\u03AE\u03C2 \u03B1\u03C0\u03CC \u03B1\u03C5\u03C4\u03BF\u03CD\u03C2 \u03C4\u03B7\u03C2 Intel \u03B1\u03BB\u03BB\u03AC \u03C7\u03C1\u03B7\u03C3\u03B9\u03BC\u03BF\u03C0\u03BF\u03AF\u03B7\u03C3\u03B5 \u03C4\u03BF \u03AF\u03B4\u03B9\u03BF \u03B1\u03BA\u03C1\u03B9\u03B2\u03CE\u03C2 \u03C3\u03CD\u03BD\u03BF\u03BB\u03BF \u03B5\u03BD\u03C4\u03BF\u03BB\u03CE\u03BD IA32 (\u03B1\u03C1\u03C7\u03B9\u03BA\u03AC \u03C3\u03C7\u03B5\u03B4\u03B9\u03B1\u03C3\u03BC\u03AD\u03BD\u03BF \u03BC\u03CC\u03BD\u03BF \u03B3\u03B9\u03B1 Intel). \u03A4\u03BF 2002 \u03C0\u03B5\u03C1\u03AF\u03C0\u03BF\u03C5 \u03B7 AMD \u03B5\u03C0\u03AD\u03BA\u03C4\u03B5\u03B9\u03BD\u03B5 \u03C4\u03BF \u03C3\u03CD\u03BD\u03BF\u03BB\u03BF \u03B5\u03BD\u03C4\u03BF\u03BB\u03CE\u03BD Intel-IA32 \u03C3\u03C4\u03BF \u03BD\u03AD\u03BF \u03C3\u03CD\u03BD\u03BF\u03BB\u03BF x86-64 \u03B3\u03B9\u03B1 \u03BD\u03B1 \u03C5\u03C0\u03BF\u03C3\u03C4\u03B7\u03C1\u03AF\u03B6\u03BF\u03BD\u03C4\u03B1\u03B9 \u03C3\u03C5\u03C3\u03C4\u03AE\u03BC\u03B1\u03C4\u03B1 64 bit \u03C4\u03B1 \u03BF\u03C0\u03BF\u03AF\u03B1 \u03BC\u03C0\u03BF\u03C1\u03BF\u03CD\u03BD \u03BD\u03B1 \u03C7\u03C1\u03B7\u03C3\u03B9\u03BC\u03BF\u03C0\u03BF\u03B9\u03B7\u03B8\u03BF\u03CD\u03BD \u03C7\u03CE\u03C1\u03BF\u03C5\u03C2 \u03B4\u03B9\u03B5\u03CD\u03B8\u03C5\u03BD\u03C3\u03B7\u03C2 \u03BC\u03BD\u03AE\u03BC\u03B7\u03C2 \u03BC\u03AD\u03C7\u03C1\u03B9 256 terrabytes ( bytes). \u0397 Intel \u03BC\u03B5 \u03C4\u03BF IA32 \u03B1\u03C0\u03B5\u03C5\u03B8\u03C5\u03BD\u03CC\u03C4\u03B1\u03BD \u03C3\u03B5 \u03BC\u03B7\u03C7\u03B1\u03BD\u03AE\u03BC\u03B1\u03C4\u03B1 32bit \u03CC\u03C0\u03BF\u03C5 \u03BC\u03C0\u03BF\u03C1\u03BF\u03CD\u03C3\u03B1\u03BD \u03BD\u03B1 \u03C7\u03C1\u03B7\u03C3\u03B9\u03BC\u03BF\u03C0\u03BF\u03B9\u03BF\u03CD\u03BD \u03C7\u03CE\u03C1\u03BF \u03B4\u03B9\u03B5\u03CD\u03B8\u03C5\u03BD\u03C3\u03B7\u03C2 \u03BC\u03BD\u03AE\u03BC\u03B7\u03C2 \u03BC\u03AD\u03C7\u03C1\u03B9 4 gbytes ( bytes).\u0397 AMD \u03B5\u03BA\u03C4\u03CC\u03C2 \u03B1\u03C0\u03CC \u03C4\u03BF \u03C3\u03CD\u03BD\u03BF\u03BB\u03BF \u03B5\u03BD\u03C4\u03BF\u03BB\u03CE\u03BD x86-64 \u03C4\u03B7\u03BD \u03B5\u03C0\u03BF\u03C7\u03AE \u03B5\u03BA\u03B5\u03AF \u03BA\u03B1\u03C4\u03AC\u03C6\u03B5\u03C1\u03B5 \u03BA\u03B1\u03B9 \u03AD\u03B2\u03B3\u03B1\u03BB\u03B5 \u03C3\u03C4\u03B7\u03BD \u03B1\u03B3\u03BF\u03C1\u03AC \u03B5\u03C0\u03B5\u03BE\u03B5\u03C1\u03B3\u03B1\u03C3\u03C4\u03AE \u03B3\u03C1\u03B7\u03B3\u03BF\u03C1\u03CC\u03C4\u03B5\u03C1\u03BF \u03B1\u03C0\u03CC 1 GHz. \u0397 \u03B5\u03C0\u03AD\u03BA\u03C4\u03B1\u03C3\u03B7 \u03C4\u03B7\u03C2 AMD \u03C3\u03C4\u03BF \u03BD\u03AD\u03BF \u03C3\u03CD\u03BD\u03BF\u03BB\u03BF x86-64 \u03B5\u03C0\u03AD\u03C4\u03C1\u03B5\u03C8\u03B5 \u03BD\u03B1 \u03BC\u03C0\u03BF\u03C1\u03BF\u03CD\u03BD \u03BD\u03B1 \u03C7\u03C1\u03B7\u03C3\u03B9\u03BC\u03BF\u03C0\u03BF\u03B9\u03B7\u03B8\u03BF\u03CD\u03BD \u03C7\u03CE\u03C1\u03BF\u03B9 \u03B4\u03B9\u03B5\u03CD\u03B8\u03C5\u03BD\u03C3\u03B7\u03C2 \u03BC\u03BD\u03AE\u03BC\u03B7\u03C2 \u03BC\u03AD\u03C7\u03C1\u03B9 256 terrabytes ( bytes). \u03A4\u03BF \u03C3\u03CD\u03BD\u03BF\u03BB\u03BF \u03B5\u03BD\u03C4\u03BF\u03BB\u03CE\u03BD x86-64 \u03C3\u03C4\u03B7\u03BD \u03C3\u03C5\u03BD\u03AD\u03C7\u03B5\u03B9\u03B1 \u03C5\u03B9\u03BF\u03B8\u03B5\u03C4\u03AE\u03B8\u03B7\u03BA\u03B5 \u03BA\u03B1\u03B9 \u03B1\u03C0\u03CC \u03C4\u03B7\u03BD Intel \u03B3\u03B9\u03B1 \u03C4\u03B7\u03BD \u03BA\u03B1\u03C4\u03B1\u03C3\u03BA\u03B5\u03C5\u03AE \u03B5\u03C0\u03B5\u03BE\u03B5\u03C1\u03B3\u03B1\u03C3\u03C4\u03CE\u03BD. \u03A4\u03BF \u03C3\u03CD\u03BD\u03BF\u03BB\u03BF \u03B5\u03BD\u03C4\u03BF\u03BB\u03CE\u03BD x86-64 \u03B5\u03BD\u03C3\u03C9\u03BC\u03B1\u03C4\u03CE\u03BD\u03B5\u03B9 \u03BB\u03B5\u03B9\u03C4\u03BF\u03C5\u03C1\u03B3\u03AF\u03B5\u03C2 \u03B3\u03B9\u03B1 \u03B4\u03B7\u03BC\u03B9\u03BF\u03C5\u03C1\u03B3\u03AF\u03B1 \u03B2\u03B5\u03BB\u03C4\u03B9\u03C9\u03BC\u03AD\u03BD\u03BF\u03C5 \u03BA\u03CE\u03B4\u03B9\u03BA\u03B1 \u03BC\u03B7\u03C7\u03B1\u03BD\u03AE\u03C2. \u039A\u03AC\u03C0\u03BF\u03B9\u03B5\u03C2 \u03B5\u03B9\u03BA\u03BF\u03BD\u03B9\u03BA\u03AD\u03C2 \u03BC\u03B7\u03C7\u03B1\u03BD\u03AE\u03C2 (virtual machines) \u03C0\u03BF\u03C5 \u03C5\u03C0\u03BF\u03C3\u03C4\u03B7\u03C1\u03AF\u03B6\u03BF\u03C5\u03BD \u03BA\u03CE\u03B4\u03B9\u03BA\u03B1 byte (bytecode), \u03CC\u03C0\u03C9\u03C2 \u03B1\u03C5\u03C4\u03AD\u03C2 \u03C4\u03B7\u03C2 Smalltalk \u03BA\u03B1\u03B9 \u03C4\u03B7\u03C2 Java, \u03BA\u03B1\u03B8\u03CE\u03C2 \u03BA\u03B1\u03B9 \u03B7 \u03B5\u03B9\u03BA\u03BF\u03BD\u03B9\u03BA\u03AE \u03BC\u03B7\u03C7\u03B1\u03BD\u03AE \u03C4\u03B7\u03C2 Microsoft \u03C3\u03B1\u03BD \u03B1\u03C1\u03C7\u03B9\u03C4\u03B5\u03BA\u03C4\u03BF\u03BD\u03B9\u03BA\u03AE \u03C3\u03C5\u03BD\u03CC\u03BB\u03BF\u03C5 \u03B5\u03BD\u03C4\u03BF\u03BB\u03CE\u03BD, \u03C4\u03B7\u03BD \u03C5\u03BB\u03BF\u03C0\u03BF\u03B9\u03BF\u03CD\u03BD \u03BC\u03B5\u03C4\u03B1\u03C6\u03C1\u03AC\u03B6\u03BF\u03BD\u03C4\u03B1\u03C2 \u03C4\u03BF\u03BD \u03BA\u03CE\u03B4\u03B9\u03BA\u03B1 byte \u03B1\u03C0\u03CC \u03C3\u03C5\u03C7\u03BD\u03AC \u03C7\u03C1\u03B7\u03C3\u03B9\u03BC\u03BF\u03C0\u03BF\u03B9\u03BF\u03CD\u03BC\u03B5\u03BD\u03B1 \u03BC\u03BF\u03BD\u03BF\u03C0\u03AC\u03C4\u03B9\u03B1 \u03BA\u03CE\u03B4\u03B9\u03BA\u03B1 \u03C3\u03B5 \u03BA\u03CE\u03B4\u03B9\u03BA\u03B1 \u03BC\u03B7\u03C7\u03B1\u03BD\u03AE\u03C2, \u03BA\u03B1\u03B9 \u03B5\u03BA\u03C4\u03B5\u03BB\u03BF\u03CD\u03BD \u03C4\u03B1 \u03BB\u03B9\u03B3\u03CC\u03C4\u03B5\u03C1\u03BF \u03C3\u03C5\u03C7\u03BD\u03AC \u03C7\u03C1\u03B7\u03C3\u03B9\u03BC\u03BF\u03C0\u03BF\u03B9\u03BF\u03CD\u03BC\u03B5\u03BD\u03B1 \u03BC\u03BF\u03BD\u03BF\u03C0\u03AC\u03C4\u03B9\u03B1 \u03BC\u03B5 \u03B4\u03B9\u03B5\u03C1\u03BC\u03B7\u03BD\u03B5\u03AF\u03B1. \u0393\u03B9\u03B1 \u03C0\u03B1\u03C1\u03AC\u03B4\u03B5\u03B9\u03B3\u03BC\u03B1, \u03BC\u03B5 \u03B1\u03C5\u03C4\u03CC\u03BD \u03C4\u03BF\u03BD \u03C4\u03C1\u03CC\u03C0\u03BF, \u03B7 \u03C5\u03BB\u03BF\u03C0\u03BF\u03AF\u03B7\u03C3\u03B5 \u03C4\u03BF \u03C3\u03CD\u03BD\u03BF\u03BB\u03BF \u03B5\u03BD\u03C4\u03BF\u03BB\u03CE\u03BD x86 \u03C3\u03B5 \u03B5\u03C0\u03B5\u03BE\u03B5\u03C1\u03B3\u03B1\u03C3\u03C4\u03AD\u03C2 ."@el . . . . "That discusses RISC and CISC, but not MISC."@en . "Tacar treoracha"@ga . . . . "Un conjunto de instrucciones, repertorio de instrucciones, juego de instrucciones o ISA (del ingl\u00E9s instruction set architecture, \u00ABarquitectura del conjunto de instrucciones\u00BB) es una especificaci\u00F3n que detalla las instrucciones que una unidad central de procesamiento puede entender y ejecutar, o el conjunto de todos los comandos implementados por un dise\u00F1o particular de una CPU. El t\u00E9rmino describe los aspectos del procesador generalmente visibles para un programador, incluidos los tipos de datos nativos, las instrucciones, los registros, la arquitectura de memoria y las interrupciones, entre otros aspectos. Existen principalmente tres tipos: CISC (Complex Instruction Set Computer), RISC (Reduced Instruction Set Computer) y SISC (Simple Instruction Set Computing). La arquitectura del conjunto de instrucciones (ISA) se emplea a veces para distinguir este conjunto de caracter\u00EDsticas de la microarquitectura, que son los elementos y t\u00E9cnicas que se emplean para implementar el conjunto de . Entre estos elementos se encuentran las microinstrucciones y los sistemas de cach\u00E9. Procesadores con diferentes dise\u00F1os internos pueden compartir un conjunto de instrucciones; por ejemplo, el Intel Pentium y AMD Athlon implementan versiones casi id\u00E9nticas del conjunto de instrucciones x86, aunque tienen dise\u00F1os diferentes."@es . . . . . . "Instruktionsupps\u00E4ttning"@sv . "\u0410\u0440\u0445\u0456\u0442\u0435\u043A\u0442\u0443\u0440\u0430 \u0441\u0438\u0441\u0442\u0435\u043C\u0438 \u043A\u043E\u043C\u0430\u043D\u0434"@uk . . . "Als Befehlssatzarchitektur, Befehlsarchitektur oder auch Programmiermodell, englisch Instruction Set Architecture bzw. als Akronym ISA, wird die gesamte nach au\u00DFen sichtbare Architektur eines Prozessors verstanden. Sie erlaubt als Schnittstelle zwischen Software und Hardware eine vollst\u00E4ndige Abstraktion der Hardware, da sie sich auf die Funktionalit\u00E4t des Prozessors beschr\u00E4nkt. W\u00E4hrend also die Mikroarchitektur die Implementierung in Hardware definiert, spezifiziert die ISA das Verhalten des Prozessors f\u00FCr die Software."@de . . . . . . . . . . . . . . . . . . . . . . . "Architektura zestawu instrukcji"@pl . . . "Is \u00E9 an gr\u00FApa ioml\u00E1n strucht\u00FArtha \u00E9 tacar treoracha de charachtair agus de shainithe at\u00E1 le haistri\u00FA chuig an r\u00EDomhaire de r\u00E9ir mar a ritear oibr\u00EDochta\u00ED. \n* CISC - complex instruction set computer n\u00F3 r\u00EDomhaire tacar treoracha coimpl\u00E9ascacha \n* RISC - reduced instruction-set computer n\u00F3 r\u00EDomhaire le tacar laghdaithe treoracha"@ga . . . . . "Befehlssatzarchitektur"@de . "\u0410\u0440\u0445\u0438\u0442\u0435\u043A\u0442\u0443\u0440\u0430 \u043D\u0430\u0431\u043E\u0440\u0430 \u043A\u043E\u043C\u0430\u043D\u0434 (\u0430\u043D\u0433\u043B. instruction set architecture, ISA) \u2014 \u0447\u0430\u0441\u0442\u044C \u0430\u0440\u0445\u0438\u0442\u0435\u043A\u0442\u0443\u0440\u044B \u043A\u043E\u043C\u043F\u044C\u044E\u0442\u0435\u0440\u0430, \u043E\u043F\u0440\u0435\u0434\u0435\u043B\u044F\u044E\u0449\u0430\u044F \u043F\u0440\u043E\u0433\u0440\u0430\u043C\u043C\u0438\u0440\u0443\u0435\u043C\u0443\u044E \u0447\u0430\u0441\u0442\u044C \u044F\u0434\u0440\u0430 \u043C\u0438\u043A\u0440\u043E\u043F\u0440\u043E\u0446\u0435\u0441\u0441\u043E\u0440\u0430. \u041D\u0430 \u044D\u0442\u043E\u043C \u0443\u0440\u043E\u0432\u043D\u0435 \u043E\u043F\u0440\u0435\u0434\u0435\u043B\u044F\u044E\u0442\u0441\u044F \u0440\u0435\u0430\u043B\u0438\u0437\u043E\u0432\u0430\u043D\u043D\u044B\u0435 \u0432 \u043C\u0438\u043A\u0440\u043E\u043F\u0440\u043E\u0446\u0435\u0441\u0441\u043E\u0440\u0435 \u043A\u043E\u043D\u043A\u0440\u0435\u0442\u043D\u043E\u0433\u043E \u0442\u0438\u043F\u0430: \n* \u0430\u0440\u0445\u0438\u0442\u0435\u043A\u0442\u0443\u0440\u0430 \u043F\u0430\u043C\u044F\u0442\u0438, \n* \u0432\u0437\u0430\u0438\u043C\u043E\u0434\u0435\u0439\u0441\u0442\u0432\u0438\u0435 \u0441 \u0432\u043D\u0435\u0448\u043D\u0438\u043C\u0438 \u0443\u0441\u0442\u0440\u043E\u0439\u0441\u0442\u0432\u0430\u043C\u0438 \u0432\u0432\u043E\u0434\u0430/\u0432\u044B\u0432\u043E\u0434\u0430, \n* \u0440\u0435\u0436\u0438\u043C\u044B \u0430\u0434\u0440\u0435\u0441\u0430\u0446\u0438\u0438, \n* \u0440\u0435\u0433\u0438\u0441\u0442\u0440\u044B, \n* \u043C\u0430\u0448\u0438\u043D\u043D\u044B\u0435 \u043A\u043E\u043C\u0430\u043D\u0434\u044B, \n* \u0440\u0430\u0437\u043B\u0438\u0447\u043D\u044B\u0435 \u0442\u0438\u043F\u044B \u0432\u043D\u0443\u0442\u0440\u0435\u043D\u043D\u0438\u0445 \u0434\u0430\u043D\u043D\u044B\u0445 (\u043D\u0430\u043F\u0440\u0438\u043C\u0435\u0440, \u0441 \u043F\u043B\u0430\u0432\u0430\u044E\u0449\u0435\u0439 \u0437\u0430\u043F\u044F\u0442\u043E\u0439, \u0446\u0435\u043B\u043E\u0447\u0438\u0441\u043B\u0435\u043D\u043D\u044B\u0435 \u0442\u0438\u043F\u044B \u0438 \u0442. \u0434.), \n* \u043E\u0431\u0440\u0430\u0431\u043E\u0442\u0447\u0438\u043A\u0438 \u043F\u0440\u0435\u0440\u044B\u0432\u0430\u043D\u0438\u0439 \u0438 \u0438\u0441\u043A\u043B\u044E\u0447\u0438\u0442\u0435\u043B\u044C\u043D\u044B\u0445 \u0441\u043E\u0441\u0442\u043E\u044F\u043D\u0438\u0439. \u041C\u0438\u043A\u0440\u043E\u0430\u0440\u0445\u0438\u0442\u0435\u043A\u0442\u0443\u0440\u0430(\u041E\u0441\u043D\u043E\u0432\u043D\u0430\u044F \u0441\u0442\u0430\u0442\u044C\u044F: \u041C\u0438\u043A\u0440\u043E\u0430\u0440\u0445\u0438\u0442\u0435\u043A\u0442\u0443\u0440\u0430)\n"@ru . . "En instruktionsupps\u00E4ttning eller ISA (fr\u00E5n engelskans Instruction Set Architecture) beskriver vilka tillg\u00E5ngar som finns tillg\u00E4ngliga f\u00F6r programmeringen av en processor. Bland annat beskrivs de instruktioner, register, adresseringsl\u00E4gen, minnesarkitektur och interrupthantering (avbrottshantering) som processorn st\u00F6der. Instruktionsupps\u00E4ttningen definierar \u00E4ven processorns maskinkod, dvs hur instruktionerna blir uttryckta som sekvenser av bin\u00E4ra ettor och nollor. Instruktionsupps\u00E4ttningar kan skilja sig mellan processorer inte bara p\u00E5 grund av vilka operationer som st\u00F6ds, utan \u00E4ven hur h\u00E4mtning och lagring av v\u00E4rden i arbetsminnet st\u00F6ds (CISC vs RISC). Tv\u00E5 olika processorer kan ha samma instruktionsupps\u00E4ttning \u00E4ven om de internt har helt olika mikroarkitekturer, se till exempel Intels Pentium- och AMD:s Athlon-processorer."@sv . . . . . . . . . . "Als Befehlssatzarchitektur, Befehlsarchitektur oder auch Programmiermodell, englisch Instruction Set Architecture bzw. als Akronym ISA, wird die gesamte nach au\u00DFen sichtbare Architektur eines Prozessors verstanden. Sie erlaubt als Schnittstelle zwischen Software und Hardware eine vollst\u00E4ndige Abstraktion der Hardware, da sie sich auf die Funktionalit\u00E4t des Prozessors beschr\u00E4nkt. W\u00E4hrend also die Mikroarchitektur die Implementierung in Hardware definiert, spezifiziert die ISA das Verhalten des Prozessors f\u00FCr die Software. Die durch Prozessorarchitekturen implementierten Befehlss\u00E4tze werden als Teil der Architektur verstanden und erhalten daher in der Regel deren Namen, z. B. die x86-Architektur. Befehlssatzarchitekturen entwickeln sich mit der Prozessorarchitektur weiter. Werden die Neuerungen als Befehlssatzerweiterungen implementiert ohne den bisherigen Befehlssatz zu ver\u00E4ndern, bleibt die ISA r\u00FCckw\u00E4rtskompatibel, wie dies beispielsweise bei x86 der Fall ist: Mit IA-32 ist die 32-Bit-Erweiterung der urspr\u00FCnglichen 16-Bit-ISA definiert und mit x64 ist ein 64-Bit-Befehlssatz und ein 64-Bit-Betriebsmodus dazugekommen. Da die Befehlssatzarchitektur als formale Beschreibung spezifiziert ist, gibt sie vor allem Assemblersprache-Programmierern die M\u00F6glichkeit, das einheitliche Verhalten von Maschinencode f\u00FCr verschiedene Implementierungen einer bestimmten ISA (Mikroarchitekturen oder virtuelle Maschinen) in Bezug auf Register, Datentypen etc. nachzuvollziehen. Damit kann er oder sie bin\u00E4rkompatible Programme f\u00FCr verschiedene Prozessoren erstellen, wenn sie dieselbe Befehlssatzarchitektur verwenden."@de . "Is \u00E9 an gr\u00FApa ioml\u00E1n strucht\u00FArtha \u00E9 tacar treoracha de charachtair agus de shainithe at\u00E1 le haistri\u00FA chuig an r\u00EDomhaire de r\u00E9ir mar a ritear oibr\u00EDochta\u00ED. \n* CISC - complex instruction set computer n\u00F3 r\u00EDomhaire tacar treoracha coimpl\u00E9ascacha \n* RISC - reduced instruction-set computer n\u00F3 r\u00EDomhaire le tacar laghdaithe treoracha"@ga . "\u03A4\u03BF \u03C3\u03CD\u03BD\u03BF\u03BB\u03BF \u03B5\u03BD\u03C4\u03BF\u03BB\u03CE\u03BD (instruction set) \u03AE \u03B1\u03C1\u03C7\u03B9\u03C4\u03B5\u03BA\u03C4\u03BF\u03BD\u03B9\u03BA\u03AE \u03C3\u03C5\u03BD\u03CC\u03BB\u03BF\u03C5 \u03B5\u03BD\u03C4\u03BF\u03BB\u03CE\u03BD (instruction set architecture, ISA), \u03B5\u03AF\u03BD\u03B1\u03B9 \u03C4\u03BF \u03C4\u03BC\u03AE\u03BC\u03B1 \u03C4\u03B7\u03C2 \u03B1\u03C1\u03C7\u03B9\u03C4\u03B5\u03BA\u03C4\u03BF\u03BD\u03B9\u03BA\u03AE\u03C2 \u03C5\u03C0\u03BF\u03BB\u03BF\u03B3\u03B9\u03C3\u03C4\u03CE\u03BD \u03C0\u03BF\u03C5 \u03C3\u03C5\u03BD\u03B4\u03AD\u03B5\u03C4\u03B1\u03B9 \u03BC\u03B5 \u03C4\u03BF\u03BD \u03C0\u03C1\u03BF\u03B3\u03C1\u03B1\u03BC\u03BC\u03B1\u03C4\u03B9\u03C3\u03BC\u03CC \u03BA\u03B1\u03B9 \u03C0\u03B5\u03C1\u03B9\u03BB\u03B1\u03BC\u03B2\u03AC\u03BD\u03B5\u03B9 \u03C4\u03BF\u03C5\u03C2 \u03C4\u03CD\u03C0\u03BF\u03C5\u03C2 \u03B4\u03B5\u03B4\u03BF\u03BC\u03AD\u03BD\u03C9\u03BD \u03C4\u03B7\u03C2 \u03BC\u03B7\u03C7\u03B1\u03BD\u03AE\u03C2, \u03C4\u03B9\u03C2 \u03B5\u03BD\u03C4\u03BF\u03BB\u03AD\u03C2, \u03C4\u03BF\u03C5\u03C2 \u03BA\u03B1\u03C4\u03B1\u03C7\u03C9\u03C1\u03B7\u03C4\u03AD\u03C2, \u03C4\u03BF\u03C5\u03C2 \u03C4\u03C1\u03CC\u03C0\u03BF\u03C5\u03C2 \u03B4\u03B9\u03B5\u03C5\u03B8\u03C5\u03BD\u03C3\u03B9\u03BF\u03B4\u03CC\u03C4\u03B7\u03C3\u03B7\u03C2 (addressing modes), \u03C4\u03B7\u03BD , \u03C4\u03BF\u03BD \u03C7\u03B5\u03B9\u03C1\u03B9\u03C3\u03BC\u03CC \u03BA\u03B1\u03B9 \u03B5\u03BE\u03B1\u03B9\u03C1\u03AD\u03C3\u03B5\u03C9\u03BD, \u03BA\u03B1\u03B8\u03CE\u03C2 \u03BA\u03B1\u03B9 \u03C4\u03B7\u03BD \u03B5\u03BE\u03C9\u03C4\u03B5\u03C1\u03B9\u03BA\u03AE \u03B5\u03AF\u03C3\u03BF\u03B4\u03BF/\u03AD\u03BE\u03BF\u03B4\u03BF (Input/output, I/O). \u039C\u03B9\u03B1 \u03B1\u03C1\u03C7\u03B9\u03C4\u03B5\u03BA\u03C4\u03BF\u03BD\u03B9\u03BA\u03AE \u03C3\u03C5\u03BD\u03CC\u03BB\u03BF\u03C5 \u03B5\u03BD\u03C4\u03BF\u03BB\u03CE\u03BD \u03C0\u03B5\u03C1\u03B9\u03BB\u03B1\u03BC\u03B2\u03AC\u03BD\u03B5\u03B9 \u03C4\u03BF \u03C3\u03CD\u03BD\u03BF\u03BB\u03BF \u03C4\u03C9\u03BD \u03BC\u03BD\u03B7\u03BC\u03BF\u03BD\u03B9\u03BA\u03CE\u03BD \u03B5\u03BD\u03C4\u03BF\u03BB\u03CE\u03BD (opcodes) \u03C4\u03B7\u03C2 \u03B3\u03BB\u03CE\u03C3\u03C3\u03B1\u03C2 \u03BC\u03B7\u03C7\u03B1\u03BD\u03AE\u03C2, \u03BA\u03B1\u03B9 \u03C4\u03B9\u03C2 \u03B5\u03BD\u03C4\u03BF\u03BB\u03AD\u03C2 \u03C0\u03BF\u03C5 \u03C5\u03BB\u03BF\u03C0\u03BF\u03B9\u03BF\u03CD\u03BD\u03C4\u03B1\u03B9 \u03B1\u03C0\u03CC \u03C4\u03BF\u03BD \u03AF\u03B4\u03B9\u03BF \u03C4\u03BF\u03BD \u03B5\u03C0\u03B5\u03BE\u03B5\u03C1\u03B3\u03B1\u03C3\u03C4\u03AE."@el . . . . "Le jeu d'instructions est l'ensemble des instructions-machine qu'un processeur d'ordinateur peut ex\u00E9cuter. Ces instructions-machines permettent d'effectuer des op\u00E9rations \u00E9l\u00E9mentaires (addition, ET logique\u2026) ou plus complexes (division, passage en mode basse consommation\u2026). Le jeu d'instructions d\u00E9finit quelles sont les instructions support\u00E9es par le processeur. Le jeu d'instructions pr\u00E9cise aussi quels sont les registres du processeur manipulables par le programmeur (les registres architecturaux)."@fr . . "\uBA85\uB839\uC5B4 \uC9D1\uD569"@ko . . . . . . . . "L'instruction set, in informatica ed elettronica, \u00E8 l'insieme di istruzioni macchina che descrive quegli aspetti, visibili a basso livello al programmatore, dell'architettura di un calcolatore, definita in inglese come instruction set architecture o in acronimo ISA. L'espressione \u00E8 a volte usata anche per distinguere l'insieme suddetto di caratteristiche dalla microarchitettura che \u00E8 l'insieme di tecniche di progettazione utilizzate per implementare l'insieme di istruzioni (tra cui microcodice, pipeline, sistemi di cache e cos\u00EC via)."@it . . . . . "December 2021"@en . . . "Instructieset"@nl . . . . . "\u6307\u4EE4\u96C6\u67B6\u69CB\uFF08\u82F1\u8A9E\uFF1AInstruction Set Architecture\uFF0C\u7E2E\u5BEB\u70BAISA\uFF09\uFF0C\u53C8\u7A31\u6307\u4EE4\u96C6\u6216\u6307\u4EE4\u96C6\u4F53\u7CFB\uFF0C\u662F\u8BA1\u7B97\u673A\u4F53\u7CFB\u7ED3\u6784\u4E2D\u8207\u7A0B\u5E8F\u8A2D\u8A08\u6709\u95DC\u7684\u90E8\u5206\uFF0C\u5305\u542B\u4E86\u57FA\u672C\u6570\u636E\u7C7B\u578B\uFF0C\u6307\u4EE4\u96C6\uFF0C\u5BC4\u5B58\u5668\uFF0C\u5BFB\u5740\u6A21\u5F0F\uFF0C\uFF0C\u4E2D\u65B7\uFF0C\u7570\u5E38\u8655\u7406\u4EE5\u53CA\u5916\u90E8I/O\u3002\u6307\u4EE4\u96C6\u67B6\u69CB\u5305\u542B\u4E00\u7CFB\u5217\u7684\u5373\u64CD\u4F5C\u7801\uFF08\u6A5F\u5668\u8A9E\u8A00\uFF09\uFF0C\u4EE5\u53CA\u7531\u7279\u5B9A\u8655\u7406\u5668\u6267\u884C\u7684\u57FA\u672C\u547D\u4EE4\u3002 \u4E0D\u540C\u7684\u5904\u7406\u5668\u201C\u5BB6\u65CF\u201D\u2014\u2014\u4F8B\u5982Intel IA-32\u548Cx86-64\u3001IBM/Freescale Power\u548CARM\u5904\u7406\u5668\u5BB6\u65CF\u2014\u2014\u6709\u4E0D\u540C\u7684\u6307\u4EE4\u96C6\u67B6\u6784\u3002 \u6307\u4EE4\u96C6\u4F53\u7CFB\u4E0E\u5FAE\u67B6\u6784\uFF08\u4E00\u5957\u7528\u4E8E\u6267\u884C\u6307\u4EE4\u96C6\u7684\u5FAE\u5904\u7406\u5668\u8BBE\u8BA1\u65B9\u6CD5\uFF09\u4E0D\u540C\u3002\u4F7F\u7528\u4E0D\u540C\u5FAE\u67B6\u69CB\u7684\u96FB\u8166\u53EF\u4EE5\u5171\u4EAB\u4E00\u79CD\u6307\u4EE4\u96C6\u3002\u4F8B\u5982\uFF0CIntel\u7684Pentium\u548CAMD\u7684AMD Athlon\uFF0C\u5169\u8005\u51E0\u4E4E\u63A1\u7528\u76F8\u540C\u7248\u672C\u7684x86\u6307\u4EE4\u96C6\u4F53\u7CFB\uFF0C\u4F46\u662F\u5169\u8005\u5728\u5185\u90E8\u8BBE\u8BA1\u4E0A\u6709\u672C\u8D28\u7684\u533A\u522B\u3002 \u4E00\u4E9B\u865B\u64EC\u6A5F\u5668\u652F\u6301\u57FA\u4E8ESmalltalk\uFF0CJava\u865B\u64EC\u6A5F\uFF0C\u5FAE\u8EDF\u7684\u516C\u5171\u8A9E\u8A00\u8FD0\u884C\u65F6\u865B\u64EC\u6A5F\u6240\u751F\u6210\u7684\u5B57\u8282\u7801\uFF0C\u4ED6\u5011\u7684\u6307\u4EE4\u96C6\u4F53\u7CFB\u5C07bytecode\uFF08\u5B57\u8282\u7801\uFF09\u4ECE\u4F5C\u4E3A\u4E00\u822C\u624B\u6BB5\u7684\u4EE3\u7801\u8DEF\u5F84\u7FFB\u8B6F\u6210\u672C\u5730\u7684\u6A5F\u5668\u8A9E\u8A00\uFF0C\u5E76\u901A\u8FC7\u89E3\u8BD1\u6267\u884C\u5E76\u4E0D\u5E38\u7528\u7684\u4EE3\u7801\u8DEF\u5F84\uFF0C\u5168\u7F8E\u9054\u4EE5\u76F8\u540C\u7684\u65B9\u5F0F\u5F00\u53D1\u4E86\u57FA\u4E8Ex86\u6307\u4EE4\u4F53\u7CFB\u7684VLIW\u8655\u7406\u5668\u3002"@zh . "1122718879"^^ . . . . . . . . "\uBA85\uB839\uC5B4 \uC9D1\uD569(\uC601\uC5B4: instruction set) \uB610\uB294 \uBA85\uB839\uC5B4 \uC9D1\uD569 \uAD6C\uC870(\uC601\uC5B4: Instruction set architecture, ISA)\uB294 \uB9C8\uC774\uD06C\uB85C\uD504\uB85C\uC138\uC11C\uAC00 \uC778\uC2DD\uD574\uC11C \uAE30\uB2A5\uC744 \uC774\uD574\uD558\uACE0 \uC2E4\uD589\uD560 \uC218 \uC788\uB294 \uAE30\uACC4\uC5B4 \uBA85\uB839\uC5B4\uB97C \uB9D0\uD55C\uB2E4. \uB9C8\uC774\uD06C\uB85C\uD504\uB85C\uC138\uC11C\uB9C8\uB2E4 \uAE30\uACC4\uC5B4 \uCF54\uB4DC\uC758 \uAE38\uC774\uC640 \uC22B\uC790 \uCF54\uB4DC\uAC00 \uB2E4\uB974\uB2E4. \uBA85\uB839\uC5B4\uC758 \uAC01 \uBE44\uD2B8\uB294 \uAE30\uB2A5\uC801\uC73C\uB85C \uBD84\uD560\uD558\uC5EC \uC758\uBBF8\uB97C \uBD80\uC5EC\uD558\uACE0 \uC22B\uC790\uD654\uD55C\uB2E4. \uD504\uB85C\uADF8\uB7A8 \uAC1C\uBC1C\uC790\uAC00 \uC22B\uC790\uB85C \uD504\uB85C\uADF8\uB7A8\uD558\uAE30\uAC00 \uBD88\uD3B8\uD558\uBBC0\uB85C \uAE30\uACC4\uC5B4\uC640 \uC77C\uB300\uC77C\uB85C \uBB38\uC790\uD654\uD55C \uAC83\uC774 \uC5B4\uC148\uBE14\uB9AC\uC5B4\uC774\uB2E4. \uCD5C\uD558\uC704 \uB808\uBCA8\uC758 \uD504\uB85C\uADF8\uB798\uBC0D \uC778\uD130\uD398\uC774\uC2A4\uB85C, \uD504\uB85C\uC138\uC11C\uAC00 \uC2E4\uD589\uD560 \uC218 \uC788\uB294 \uBAA8\uB4E0 \uBA85\uB839\uC5B4\uB4E4\uC744 \uD3EC\uD568\uD55C\uB2E4. \uBA85\uB839\uC5B4 \uC9D1\uD569, \uACE7 \uBA85\uB839\uC5B4 \uC9D1\uD569 \uAD6C\uC870\uB294 \uC790\uB8CC\uD615, , \uB808\uC9C0\uC2A4\uD130, , , \uC778\uD130\uB7FD\uD2B8, \uC608\uC678 \uCC98\uB9AC, \uC678\uBD80 \uC785\uCD9C\uB825\uC744 \uD3EC\uD568\uD55C \uD504\uB85C\uADF8\uB798\uBC0D \uAD00\uB828 \uCEF4\uD4E8\uD130 \uC544\uD0A4\uD14D\uCC98\uC758 \uC77C\uBD80\uC774\uB2E4. ISA\uB294 \uD2B9\uC815\uD55C CPU \uB514\uC790\uC778\uC73C\uB85C \uCD94\uAC00\uB41C \uC21C\uC218 \uBA85\uB839\uC5B4\uC778 opcode\uC758 \uC9D1\uD569 \uADDC\uACA9(\uAE30\uACC4\uC5B4)\uC744 \uD3EC\uD568\uD55C\uB2E4. RISC CPU\uB294 \uBA85\uB839\uC5B4\uC758 \uAD6C\uC870\uC640 \uBA85\uB839\uC5B4\uC758 \uC22B\uC790\uB97C \uB2E8\uC21C\uD654 \uD558\uC5EC \uBE60\uB978 \uC2E4\uD589\uC774 \uAC00\uB2A5\uD558\uACE0 \uD558\uB4DC\uC6E8\uC5B4\uB97C \uC904\uC77C \uC218 \uC788\uB2E4. ARM\uC758 \uACBD\uC6B0 \uB2E8\uC21C\uD654\uB97C \uD1B5\uD574 \uC2E4\uD589\uC18D\uB3C4\uC640 \uC804\uB825\uC18C\uBAA8\uC5D0 \uC720\uB9AC\uD558\uBBC0\uB85C \uC774\uB3D9\uC804\uD654\uC640 \uAC19\uC740 \uC774\uB3D9\uC7A5\uCE58\uC5D0 \uB9CE\uC774 \uC0AC\uC6A9\uD55C\uB2E4. ARM\uC758 \uBA85\uB839\uC5B4 \uAE38\uC774\uB294 32\uBE44\uD2B8(16\uBE44\uD2B8 Thumb \uC81C\uC678)\uB85C \uAD6C\uC131\uB418\uACE0, \uC624\uD37C\uB79C\uB4DC(operand)\uB97C 32\uBE44\uD2B8 \uB0B4\uC5D0 \uC874\uC7AC\uD55C\uB2E4. CISC\uC758 \uC624\uD37C\uB79C\uB4DC\uAC00 op \uCF54\uB4DC \uB2E4\uC74C\uC5D0 \uC624\uB294 \uAD6C\uC870\uC640 \uB300\uC870\uC801\uC774\uB2E4. \uB300\uC2E0 32\uBE44\uD2B8 \uBAA8\uB450\uB97C \uC9C0\uC815\uD560 \uC218 \uC5C6\uC73C\uBBC0\uB85C \uC6D0\uAC70\uB9AC \uC8FC\uC18C\uB098 \uB370\uC774\uD130 \uC9C0\uC815\uC774 \uBD88\uAC00\uB2A5\uD574\uC838 \uBCF5\uC218\uC758 \uBA85\uB839\uC5B4\uB97C \uC0AC\uC6A9\uD560 \uD544\uC694\uAC00 \uC0DD\uAE38 \uC218 \uC788\uB2E4. \uAC01 \uAE30\uACC4\uC5B4 \uBA85\uB839\uC5B4\uB97C \uC2E4\uD589\uD558\uB294 \uBA85\uB839 \uC8FC\uAE30 \uB2E8\uACC4 \uBCC4 \uCC98\uB9AC\uB97C \uC704\uD574 \uB9C8\uC774\uD06C\uB85C\uCF54\uB4DC\uB85C \uC791\uC131\uB41C \uD504\uB85C\uADF8\uB7A8\uC774 \uB9C8\uC774\uD06C\uB85C\uD504\uB85C\uC138\uC11C \uB0B4\uC758 \uBA54\uBAA8\uB9AC(ROM)\uC5D0 \uACE0\uC815\uB418\uBBC0\uB85C \uC774\uBBF8 \uACB0\uC815\uB418\uC5B4 \uC788\uC5B4 \uBCC0\uACBD\uD560 \uC218 \uC5C6\uB2E4. \uAC1C\uBC1C\uC790\uAC00 \uC778\uC2DD\uD558\uB294\uB370 \uBD88\uD3B8\uD558\uBBC0\uB85C \uC5B4\uC148\uBE14\uB9AC\uC5B4\uB85C \uD504\uB85C\uADF8\uB7A8 \uCF54\uB4DC\uB97C \uC791\uC131\uD558\uACE0 \uC5B4\uC148\uBE14\uB7EC\uC5D0 \uC758\uD574 \uAE30\uACC4\uC5B4 \uCF54\uB4DC\uB85C \uC804\uD658\uB418\uC5B4 \uBA54\uBAA8\uB9AC\uC5D0 \uB123\uACE0 \uC2E4\uD589\uD55C\uB2E4. \uD558\uC774\uB808\uBCA8 \uD504\uB85C\uADF8\uB7A8 \uC5B8\uC5B4\uB3C4 \uCEF4\uD30C\uC77C\uB7EC\uC5D0 \uC758\uD574 \uAE30\uACC4\uC5B4 \uBA85\uB839\uC5B4\uB85C \uBC14\uB010\uB2E4. C \uC5B8\uC5B4\uB85C \uD504\uB85C\uADF8\uB798\uBC0D \uD560 \uACBD\uC6B0, C \uC5B8\uC5B4\uB294 \uAC19\uC740 \uCF54\uB4DC\uB77C\uB3C4 \uB2E4\uB978 CPU\uC5D0\uC11C \uC2E4\uD589\uD558\uB824\uBA74 \uB2E4\uB978 \uC22B\uC790\uC758 \uAE30\uACC4\uC5B4\uB85C \uC804\uD658\uB418\uC5B4\uC57C \uD558\uBBC0\uB85C \uB2E4\uB978 \uCEF4\uD30C\uC77C\uB7EC \uB3C4\uAD6C\uAC00 \uD544\uC694\uD558\uB2E4. \uBA85\uB839\uC5B4 \uC9D1\uD569 \uAD6C\uC870\uB97C \uBB3C\uB9AC\uC801\uC73C\uB85C \uAD6C\uD604\uD558\uB294 \uBC29\uBC95\uC744 \uB9C8\uC774\uD06C\uB85C\uC544\uD0A4\uD14D\uCC98 \uD639\uC740 \uCEF4\uD4E8\uD130 \uC870\uC9C1\uC774\uB77C\uACE0 \uD558\uBA70, \uAC19\uC740 \uBA85\uB839\uC5B4 \uC9D1\uD569 \uAD6C\uC870\uB97C \uC11C\uB85C \uB2E4\uB978 \uB9C8\uC774\uD06C\uB85C\uC544\uD0A4\uD14D\uCC98\uB85C \uAD6C\uD604\uD558\uAE30\uB3C4 \uD55C\uB2E4. \uC608\uB97C \uB4E4\uC5B4, \uC778\uD154\uC758 \uD39C\uD2F0\uC5C4\uACFC AMD\uC758 \uC560\uC2AC\uB860\uC740 \uAC70\uC758 \uAC19\uC740 \uBA85\uB839\uC5B4 \uC9D1\uD569 \uAD6C\uC870\uB97C \uC11C\uB85C \uB2E4\uB978 \uB9C8\uC774\uD06C\uB85C\uC544\uD0A4\uD14D\uCC98\uB85C \uAD6C\uD604\uD55C \uAC83\uC774\uB2E4."@ko . "Architektura zestawu instrukcji procesora (ang. instruction set architecture, ISA), model programowy procesora \u2212 og\u00F3lne okre\u015Blenie dotycz\u0105ce organizacji, funkcjonalno\u015Bci i zasad dzia\u0142ania procesora, widoczne z punktu widzenia programisty jako dost\u0119pne mechanizmy programowania. Na model programowy procesora sk\u0142adaj\u0105 si\u0119, mi\u0119dzy innymi: \n* lista rozkaz\u00F3w procesora, \n* typy danych, \n* dost\u0119pne tryby adresowania, \n* zestaw rejestr\u00F3w dost\u0119pnych dla programisty, \n* zasady obs\u0142ugi wyj\u0105tk\u00F3w i przerwa\u0144. Procesory posiadaj\u0105ce ten sam model programowy s\u0105 ze sob\u0105 kompatybilne, co oznacza, \u017Ce mog\u0105 wykonywa\u0107 te same programy i generowa\u0107 te same rezultaty. W pocz\u0105tkowej historii procesor\u00F3w model programowy procesora zale\u017Ca\u0142 od fizycznej implementacji procesora i niejednokrotnie ca\u0142kowicie z niej wynika\u0142. Obecnie tendencja jest odwrotna i stosuje si\u0119 bardzo r\u00F3\u017Cne implementacje fizyczne (mikroarchitektury) pochodz\u0105ce od r\u00F3\u017Cnych producent\u00F3w, natomiast realizuj\u0105ce ten sam ISA."@pl . . . "Conjunto de instru\u00E7\u00F5es"@pt . . . "Instruction set architecture"@en . "Architektura zestawu instrukcji procesora (ang. instruction set architecture, ISA), model programowy procesora \u2212 og\u00F3lne okre\u015Blenie dotycz\u0105ce organizacji, funkcjonalno\u015Bci i zasad dzia\u0142ania procesora, widoczne z punktu widzenia programisty jako dost\u0119pne mechanizmy programowania. Na model programowy procesora sk\u0142adaj\u0105 si\u0119, mi\u0119dzy innymi: \n* lista rozkaz\u00F3w procesora, \n* typy danych, \n* dost\u0119pne tryby adresowania, \n* zestaw rejestr\u00F3w dost\u0119pnych dla programisty, \n* zasady obs\u0142ugi wyj\u0105tk\u00F3w i przerwa\u0144."@pl . . "Conjunt d'instruccions"@ca . . . "\u0410\u0440\u0445\u0438\u0442\u0435\u043A\u0442\u0443\u0440\u0430 \u043D\u0430\u0431\u043E\u0440\u0430 \u043A\u043E\u043C\u0430\u043D\u0434 (\u0430\u043D\u0433\u043B. instruction set architecture, ISA) \u2014 \u0447\u0430\u0441\u0442\u044C \u0430\u0440\u0445\u0438\u0442\u0435\u043A\u0442\u0443\u0440\u044B \u043A\u043E\u043C\u043F\u044C\u044E\u0442\u0435\u0440\u0430, \u043E\u043F\u0440\u0435\u0434\u0435\u043B\u044F\u044E\u0449\u0430\u044F \u043F\u0440\u043E\u0433\u0440\u0430\u043C\u043C\u0438\u0440\u0443\u0435\u043C\u0443\u044E \u0447\u0430\u0441\u0442\u044C \u044F\u0434\u0440\u0430 \u043C\u0438\u043A\u0440\u043E\u043F\u0440\u043E\u0446\u0435\u0441\u0441\u043E\u0440\u0430. \u041D\u0430 \u044D\u0442\u043E\u043C \u0443\u0440\u043E\u0432\u043D\u0435 \u043E\u043F\u0440\u0435\u0434\u0435\u043B\u044F\u044E\u0442\u0441\u044F \u0440\u0435\u0430\u043B\u0438\u0437\u043E\u0432\u0430\u043D\u043D\u044B\u0435 \u0432 \u043C\u0438\u043A\u0440\u043E\u043F\u0440\u043E\u0446\u0435\u0441\u0441\u043E\u0440\u0435 \u043A\u043E\u043D\u043A\u0440\u0435\u0442\u043D\u043E\u0433\u043E \u0442\u0438\u043F\u0430: \n* \u0430\u0440\u0445\u0438\u0442\u0435\u043A\u0442\u0443\u0440\u0430 \u043F\u0430\u043C\u044F\u0442\u0438, \n* \u0432\u0437\u0430\u0438\u043C\u043E\u0434\u0435\u0439\u0441\u0442\u0432\u0438\u0435 \u0441 \u0432\u043D\u0435\u0448\u043D\u0438\u043C\u0438 \u0443\u0441\u0442\u0440\u043E\u0439\u0441\u0442\u0432\u0430\u043C\u0438 \u0432\u0432\u043E\u0434\u0430/\u0432\u044B\u0432\u043E\u0434\u0430, \n* \u0440\u0435\u0436\u0438\u043C\u044B \u0430\u0434\u0440\u0435\u0441\u0430\u0446\u0438\u0438, \n* \u0440\u0435\u0433\u0438\u0441\u0442\u0440\u044B, \n* \u043C\u0430\u0448\u0438\u043D\u043D\u044B\u0435 \u043A\u043E\u043C\u0430\u043D\u0434\u044B, \n* \u0440\u0430\u0437\u043B\u0438\u0447\u043D\u044B\u0435 \u0442\u0438\u043F\u044B \u0432\u043D\u0443\u0442\u0440\u0435\u043D\u043D\u0438\u0445 \u0434\u0430\u043D\u043D\u044B\u0445 (\u043D\u0430\u043F\u0440\u0438\u043C\u0435\u0440, \u0441 \u043F\u043B\u0430\u0432\u0430\u044E\u0449\u0435\u0439 \u0437\u0430\u043F\u044F\u0442\u043E\u0439, \u0446\u0435\u043B\u043E\u0447\u0438\u0441\u043B\u0435\u043D\u043D\u044B\u0435 \u0442\u0438\u043F\u044B \u0438 \u0442. \u0434.), \n* \u043E\u0431\u0440\u0430\u0431\u043E\u0442\u0447\u0438\u043A\u0438 \u043F\u0440\u0435\u0440\u044B\u0432\u0430\u043D\u0438\u0439 \u0438 \u0438\u0441\u043A\u043B\u044E\u0447\u0438\u0442\u0435\u043B\u044C\u043D\u044B\u0445 \u0441\u043E\u0441\u0442\u043E\u044F\u043D\u0438\u0439. \u041C\u0438\u043A\u0440\u043E\u0430\u0440\u0445\u0438\u0442\u0435\u043A\u0442\u0443\u0440\u0430(\u041E\u0441\u043D\u043E\u0432\u043D\u0430\u044F \u0441\u0442\u0430\u0442\u044C\u044F: \u041C\u0438\u043A\u0440\u043E\u0430\u0440\u0445\u0438\u0442\u0435\u043A\u0442\u0443\u0440\u0430)\n\u041E\u043F\u0438\u0441\u044B\u0432\u0430\u0435\u0442 \u043C\u043E\u0434\u0435\u043B\u044C, \u0442\u043E\u043F\u043E\u043B\u043E\u0433\u0438\u044E \u0438 \u0440\u0435\u0430\u043B\u0438\u0437\u0430\u0446\u0438\u044E ISA \u043D\u0430 \u043C\u0438\u043A\u0440\u043E\u0441\u0445\u0435\u043C\u0435 \u043C\u0438\u043A\u0440\u043E\u043F\u0440\u043E\u0446\u0435\u0441\u0441\u043E\u0440\u0430.\u041D\u0430 \u044D\u0442\u043E\u043C \u0443\u0440\u043E\u0432\u043D\u0435 \u043E\u043F\u0440\u0435\u0434\u0435\u043B\u044F\u0435\u0442\u0441\u044F: \n* \u043A\u043E\u043D\u0441\u0442\u0440\u0443\u043A\u0446\u0438\u044F \u0438 \u0432\u0437\u0430\u0438\u043C\u043E\u0441\u0432\u044F\u0437\u044C \u043E\u0441\u043D\u043E\u0432\u043D\u044B\u0445 \u0431\u043B\u043E\u043A\u043E\u0432 \u0426\u041F, \n* \u0441\u0442\u0440\u0443\u043A\u0442\u0443\u0440\u0430 \u044F\u0434\u0435\u0440, \u0438\u0441\u043F\u043E\u043B\u043D\u0438\u0442\u0435\u043B\u044C\u043D\u044B\u0445 \u0443\u0441\u0442\u0440\u043E\u0439\u0441\u0442\u0432, \u0410\u041B\u0423, \u0430 \u0442\u0430\u043A\u0436\u0435 \u0438\u0445 \u0432\u0437\u0430\u0438\u043C\u043E\u0434\u0435\u0439\u0441\u0442\u0432\u0438\u044F, \n* \u0431\u043B\u043E\u043A\u043E\u0432 \u043F\u0440\u0435\u0434\u0441\u043A\u0430\u0437\u0430\u043D\u0438\u044F \u043F\u0435\u0440\u0435\u0445\u043E\u0434\u043E\u0432, \n* \u043E\u0440\u0433\u0430\u043D\u0438\u0437\u0430\u0446\u0438\u044F \u043A\u043E\u043D\u0432\u0435\u0439\u0435\u0440\u043E\u0432, \n* \u043E\u0440\u0433\u0430\u043D\u0438\u0437\u0430\u0446\u0438\u044F \u043A\u044D\u0448-\u043F\u0430\u043C\u044F\u0442\u0438, \n* \u0432\u0437\u0430\u0438\u043C\u043E\u0434\u0435\u0439\u0441\u0442\u0432\u0438\u0435 \u0441 \u0432\u043D\u0435\u0448\u043D\u0438\u043C\u0438 \u0443\u0441\u0442\u0440\u043E\u0439\u0441\u0442\u0432\u0430\u043C\u0438. \u0412 \u0440\u0430\u043C\u043A\u0430\u0445 \u043E\u0434\u043D\u043E\u0433\u043E \u0441\u0435\u043C\u0435\u0439\u0441\u0442\u0432\u0430 \u043C\u0438\u043A\u0440\u043E\u043F\u0440\u043E\u0446\u0435\u0441\u0441\u043E\u0440\u043E\u0432 \u043C\u0438\u043A\u0440\u043E\u0430\u0440\u0445\u0438\u0442\u0435\u043A\u0442\u0443\u0440\u0430 \u0441\u043E \u0432\u0440\u0435\u043C\u0435\u043D\u0435\u043C \u0440\u0430\u0441\u0448\u0438\u0440\u044F\u0435\u0442\u0441\u044F \u043F\u0443\u0442\u0451\u043C \u0434\u043E\u0431\u0430\u0432\u043B\u0435\u043D\u0438\u044F \u043D\u043E\u0432\u044B\u0445 \u0443\u0441\u043E\u0432\u0435\u0440\u0448\u0435\u043D\u0441\u0442\u0432\u043E\u0432\u0430\u043D\u0438\u0439 \u0438 \u043E\u043F\u0442\u0438\u043C\u0438\u0437\u0430\u0446\u0438\u0438 \u0441\u0443\u0449\u0435\u0441\u0442\u0432\u0443\u044E\u0449\u0438\u0445 \u043A\u043E\u043C\u0430\u043D\u0434 \u0441 \u0446\u0435\u043B\u044C\u044E \u043F\u043E\u0432\u044B\u0448\u0435\u043D\u0438\u044F \u043F\u0440\u043E\u0438\u0437\u0432\u043E\u0434\u0438\u0442\u0435\u043B\u044C\u043D\u043E\u0441\u0442\u0438, \u044D\u043D\u0435\u0440\u0433\u043E\u0441\u0431\u0435\u0440\u0435\u0436\u0435\u043D\u0438\u044F \u0438 \u0444\u0443\u043D\u043A\u0446\u0438\u043E\u043D\u0430\u043B\u044C\u043D\u044B\u0445 \u0432\u043E\u0437\u043C\u043E\u0436\u043D\u043E\u0441\u0442\u0435\u0439 \u043C\u0438\u043A\u0440\u043E\u043F\u0440\u043E\u0446\u0435\u0441\u0441\u043E\u0440\u0430. \u041F\u0440\u0438 \u044D\u0442\u043E\u043C \u0441\u043E\u0445\u0440\u0430\u043D\u044F\u0435\u0442\u0441\u044F \u0441\u043E\u0432\u043C\u0435\u0441\u0442\u0438\u043C\u043E\u0441\u0442\u044C \u0441 \u043F\u0440\u0435\u0434\u044B\u0434\u0443\u0449\u0435\u0439 \u0432\u0435\u0440\u0441\u0438\u0435\u0439 ISA. \u0423\u0440\u043E\u0432\u043D\u0438, \u0440\u0435\u0430\u043B\u0438\u0437\u0443\u0435\u043C\u044B\u0435 \u0432 \u0430\u0440\u0445\u0438\u0442\u0435\u043A\u0442\u0443\u0440\u0435, \u043C\u0438\u043A\u0440\u043E\u0430\u0440\u0445\u0438\u0442\u0435\u043A\u0442\u0443\u0440\u0435 \u0438 \u0432 \u0441\u0435\u043C\u0435\u0439\u0441\u0442\u0432\u0435 \u043F\u0440\u043E\u0446\u0435\u0441\u0441\u043E\u0440\u043E\u0432 \u0441\u043E\u043E\u0442\u0432\u0435\u0442\u0441\u0442\u0432\u0435\u043D\u043D\u043E, \u0430 \u0442\u0430\u043A\u0436\u0435 \u0438\u0445 \u0432\u0437\u0430\u0438\u043C\u043E\u0441\u0432\u044F\u0437\u044C \u043E\u043F\u0438\u0441\u0430\u043D\u044B \u043D\u0430 \u0440\u0438\u0441. 1 \u0432 \u0434\u043E\u043A\u0443\u043C\u0435\u043D\u0442\u0435 White Paper Inside Intel\u00AECore\u2122 Microarchitecture (\u0430\u043D\u0433\u043B.)"@ru . . "Een instructieset is de verzameling van alle mogelijke machinecodes die een processor kan verwerken. De instructies worden als binaire codes in het geheugen gezet, het programmeren zelf gebeurt in assembleertalen of (meestal) hogere programmeertalen. De meeste moderne processors hebben een zeer uitgebreide instructieset, waarbij een enkele instructie meerdere functies kan uitvoeren. Bijvoorbeeld: \"haal de waarde op die op de geheugenplaats staat die door register X wordt aangewezen, tel deze op bij de waarde in het werkregister en laat register X naar de volgende geheugenplaats wijzen\"."@nl . . . "Conjunto de instru\u00E7\u00F5es (tradu\u00E7\u00E3o de instruction set) s\u00E3o as opera\u00E7\u00F5es que um processador, microprocessador, microcontrolador, CPU ou outros perif\u00E9ricos program\u00E1veis suporta, fornece ou disponibiliza para o programador, ou seja, \u00E9 a representa\u00E7\u00E3o em mnem\u00F4nicos do c\u00F3digo de m\u00E1quina, com a finalidade de facilitar o acesso ao componente. Cada componente possui o seu pr\u00F3prio conjunto de instru\u00E7\u00F5es, que \u00E9 fornecido pelo fabricante, que tamb\u00E9m costuma fornecer ou disponibilizar um montador assembly, que transforma o conjunto de instru\u00E7\u00F5es em c\u00F3digo de m\u00E1quina para ser utilizado pelo componente."@pt . . . . . . . . . "Jeu d'instructions"@fr . . . . . . . . "Un conjunt d'instruccions o repertori d'instruccions, joc d'instruccions o ISA (de l'angl\u00E8s Instruction Set Architecture, \u00ABArquitectura del Conjunt d'Instruccions\u00BB) \u00E9s una especificaci\u00F3 que detalla les instruccions que una CPU d'un ordinador pot entendre i executar, o el conjunt de tots els comandos implementats per un disseny particular d'una CPU. El terme descriu els aspectes del processador generalment visibles a un programador, incloent els tipus de dades natives, les instruccions, els registres, l'arquitectura de mem\u00F2ria i les interrupcions, entre altres aspectes. Existeixen tres tipus principals: CISC (Complex Instruction Set Computer), RISC (Reduced Instruction Set Computer) i SISC (Simple Instruction Set Computing). L'arquitectura del conjunt d'instruccions (ISA) s'empra de vegades per distingir aquest conjunt de caracter\u00EDstiques de la microarquitectura, que s\u00F3n els elements i t\u00E8cniques que s'empren per implementar el conjunt d'instruccions. Entre aquests elements es troben les microinstruccions i els sistemes de cache. Processadors amb diferents dissenys interns poden compartir un conjunt d'instruccions; per exemple l'Intel Pentium i l'AMD Athlon implementen versions gaireb\u00E9 id\u00E8ntiques del conjunt d'instruccions x86, encara que tenen dissenys interns completament oposats."@ca . . . . "Set instruksi"@in . "In computer science, an instruction set architecture (ISA), also called computer architecture, is an abstract model of a computer. A device that executes instructions described by that ISA, such as a central processing unit (CPU), is called an implementation. In general, an ISA defines the supported instructions, data types, registers, the hardware support for managing main memory, fundamental features (such as the memory consistency, addressing modes, virtual memory), and the input/output model of a family of implementations of the ISA."@en . . . "\u0410\u0440\u0445\u0456\u0442\u0435\u043A\u0442\u0443\u0301\u0440\u0430 \u0441\u0438\u0441\u0442\u0435\u0301\u043C\u0438 \u043A\u043E\u043C\u0430\u0301\u043D\u0434 (\u0430\u043D\u0433\u043B. instruction set architecture, ISA; \u0442\u0430\u043A\u043E\u0436 \u0441\u0438\u0441\u0442\u0435\u043C\u043D\u0430 \u0430\u0440\u0445\u0456\u0442\u0435\u043A\u0442\u0443\u0440\u0430) \u0435\u043B\u0435\u043A\u0442\u0440\u043E\u043D\u043D\u043E\u0457 \u043E\u0431\u0447\u0438\u0441\u043B\u044E\u0432\u0430\u043B\u044C\u043D\u043E\u0457 \u043C\u0430\u0448\u0438\u043D\u0438 \u2014 \u0441\u043A\u043B\u0430\u0434\u043E\u0432\u0430 \u0447\u0430\u0441\u0442\u0438\u043D\u0430 \u0430\u0440\u0445\u0456\u0442\u0435\u043A\u0442\u0443\u0440\u0438 \u043A\u043E\u043C\u043F'\u044E\u0442\u0435\u0440\u0430, \u0449\u043E \u043C\u0430\u0454 \u043D\u0430\u0441\u0442\u0443\u043F\u043D\u0456 \u0445\u0430\u0440\u0430\u043A\u0442\u0435\u0440\u0438\u0441\u0442\u0438\u043A\u0438:"@uk . . . . . . . . . . . . . . . "47772"^^ . . . . . . . . . . . "Conjunto de instru\u00E7\u00F5es (tradu\u00E7\u00E3o de instruction set) s\u00E3o as opera\u00E7\u00F5es que um processador, microprocessador, microcontrolador, CPU ou outros perif\u00E9ricos program\u00E1veis suporta, fornece ou disponibiliza para o programador, ou seja, \u00E9 a representa\u00E7\u00E3o em mnem\u00F4nicos do c\u00F3digo de m\u00E1quina, com a finalidade de facilitar o acesso ao componente. Cada componente possui o seu pr\u00F3prio conjunto de instru\u00E7\u00F5es, que \u00E9 fornecido pelo fabricante, que tamb\u00E9m costuma fornecer ou disponibilizar um montador assembly, que transforma o conjunto de instru\u00E7\u00F5es em c\u00F3digo de m\u00E1quina para ser utilizado pelo componente. No caso dos processadores, quando o conjunto de instru\u00E7\u00F5es for reduzido leva-o a ter o nome de RISC e se forem complexas o nome de CISC. \u25CF \u201CFronteira\u201D entre o projectista e o programador de uma m\u00E1quina: \u2013 Projectista: fornece os requisitos funcionais de uma CPU \u25CF quantos e quais registadores? quais opera\u00E7\u00F5es na ULA? qual organiza\u00E7\u00E3o da Unidade de Controle? \u2013 Programador: fornece o modo mais b\u00E1sico de interagir com o hardware do computador \u25CF Nesse n\u00EDvel de programa\u00E7\u00E3o, \u00E9 necess\u00E1rio conhecer alguns detalhes internos da m\u00E1quina: conjunto de registadores, estrutura da mem\u00F3ria, tipos de dados dispon\u00EDveis directam Projeto do conjunto de instru\u00E7\u00F5es: O projeto de um conjunto de instru\u00E7\u00F5es \u00E9 muito complexo, uma vez que ele afeta muitos aspectos do sistema computacional Os elementos mais usados no projeto de instru\u00E7\u00F5es s\u00E3o : \u00B7 Repert\u00F3rio de opera\u00E7\u00F5es \u00B7 Tipos de dados \u00B7 Formato das instru\u00E7\u00F5es \u00B7 Registradores \u00B7 Modos de endere\u00E7amento Repert\u00F3rio de opera\u00E7\u00F5es - quantas e quais as opera\u00E7\u00F5es que s\u00E3o necess\u00E1rias e qu\u00E3o complexas elas podem ser Tipos de dados \u2013 quais os tipos de dados sobre os quais as opera\u00E7\u00F5es s\u00E3o efetuadas Formato das instru\u00E7\u00F5es - comprimento das instru\u00E7\u00F5es em bits, n\u00FAmero de endere\u00E7os, tamanho dos v\u00E1rios campos Registradores - n\u00BA e tamanho dos registradores da CPU que podem ser usados e o prop\u00F3sito de cada um Modos de endere\u00E7amento \u2013 de que modo o endere\u00E7o de um operando pode ser especificado"@pt . . . . . . . . . . . . . "L'instruction set, in informatica ed elettronica, \u00E8 l'insieme di istruzioni macchina che descrive quegli aspetti, visibili a basso livello al programmatore, dell'architettura di un calcolatore, definita in inglese come instruction set architecture o in acronimo ISA. L'espressione \u00E8 a volte usata anche per distinguere l'insieme suddetto di caratteristiche dalla microarchitettura che \u00E8 l'insieme di tecniche di progettazione utilizzate per implementare l'insieme di istruzioni (tra cui microcodice, pipeline, sistemi di cache e cos\u00EC via)."@it . . . . "\u0645\u062C\u0645\u0648\u0639\u0629 \u0627\u0644\u062A\u0639\u0644\u064A\u0645\u0627\u062A \u0623\u0648 \u0627\u0644\u0627\u0648\u0627\u0645\u0631 (\u0628\u0627\u0644\u0625\u0646\u062C\u0644\u064A\u0632\u064A\u0629: Instruction set)\u200F \u0647\u064A \u0642\u0627\u0626\u0645\u0629 \u0628\u062C\u0645\u064A\u0639 \u0627\u0644\u0623\u0648\u0627\u0645\u0631 \u0627\u0644\u0645\u062A\u0627\u062D\u0629 \u0628\u0645\u062E\u062A\u0644\u0641 \u0623\u0634\u0643\u0627\u0644\u0647\u0627 \u0627\u0644\u062A\u064A \u064A\u0645\u0643\u0646 \u0644\u0645\u0639\u0627\u0644\u062C \u0645\u0627 (\u0648\u062D\u062F\u0629 \u0645\u0639\u0627\u0644\u062C\u0629 \u0645\u0631\u0643\u0632\u064A\u0629) \u0623\u0646 \u064A\u0642\u0648\u0645 \u0628\u062A\u0646\u0641\u064A\u0630\u0647\u0627. \u062A\u062A\u0636\u0645\u0646 \u0647\u0630\u0647 \u0627\u0644\u062A\u0639\u0644\u064A\u0645\u0627\u062A: \n* \u062A\u0639\u0644\u064A\u0645\u0627\u062A \u062D\u0633\u0627\u0628\u064A\u0629: \u0645\u062B\u0644 \u062A\u0639\u0644\u064A\u0645\u0627\u062A \u0627\u0644\u062C\u0645\u0639 \u0648\u0627\u0644\u0637\u0631\u062D \n* \u062A\u0639\u0644\u064A\u0645\u0627\u062A \u0645\u0646\u0637\u0642\u064A\u0629: \u0643\u062A\u0639\u0644\u064A\u0645\u0627\u062A \u0627\u0644\u0636\u0631\u0628 \u0627\u0644\u0645\u0646\u0637\u0642\u064A AND \u0648\u0627\u0644\u062C\u0645\u0639 \u0627\u0644\u0645\u0646\u0637\u0642\u064A OR \u0648\u0627\u0644\u0646\u0641\u064A \u0627\u0644\u0645\u0646\u0637\u0642\u064A NOT \n* \u062A\u0639\u0644\u064A\u0645\u0627\u062A \u0646\u0642\u0644 \u0627\u0644\u0645\u0639\u0637\u064A\u0627\u062A: \u0627\u0644\u062A\u064A \u062A\u0642\u0648\u0645 \u0628\u0646\u0642\u0644 \u0627\u0644\u0628\u064A\u0627\u0646\u0627\u062A \u0628\u064A\u0646 \u0627\u0644\u0633\u0640\u0651\u0640\u0650\u0640\u062C\u0640\u0640\u0650\u0640\u0644\u0627\u0651\u062A \u0627\u0644\u062F\u0627\u062E\u0644\u064A\u0629 \u0644\u0644\u0645\u0639\u0627\u0644\u062C \u0648\u0627\u0644\u0630\u0627\u0643\u0631\u0629 \u0623\u0648 \u0627\u0644\u0645\u0643\u062F\u0633 \u0623\u0648 \n* \u062A\u0639\u0644\u064A\u0645\u0627\u062A \u0627\u0644\u062A\u062D\u0643\u0645 \u0628\u0633\u064A\u0631 \u0627\u0644\u0628\u0631\u0646\u0627\u0645\u062C: \u0643\u062A\u0639\u0644\u064A\u0645\u0627\u062A \u0627\u0644\u0642\u0641\u0632 \u0627\u0644\u063A\u064A\u0631 \u0627\u0644\u0645\u0634\u0631\u0648\u0637 \u0648\u0627\u0644\u0642\u0641\u0632 \u0627\u0644\u0645\u0634\u0631\u0648\u0637 \u0648\u062A\u0639\u0644\u064A\u0645\u0627\u062A \u0627\u0633\u062A\u062F\u0639\u0627\u0621 \u0627\u0644\u0628\u0631\u0627\u0645\u062C \u0627\u0644\u0641\u0631\u0639\u064A\u0629 \u0648\u0627\u0644\u0639\u0648\u062F\u0629 \u0645\u0646\u0647\u0627"@ar . "\u0645\u062C\u0645\u0648\u0639\u0629 \u0627\u0644\u062A\u0639\u0644\u064A\u0645\u0627\u062A \u0623\u0648 \u0627\u0644\u0627\u0648\u0627\u0645\u0631 (\u0628\u0627\u0644\u0625\u0646\u062C\u0644\u064A\u0632\u064A\u0629: Instruction set)\u200F \u0647\u064A \u0642\u0627\u0626\u0645\u0629 \u0628\u062C\u0645\u064A\u0639 \u0627\u0644\u0623\u0648\u0627\u0645\u0631 \u0627\u0644\u0645\u062A\u0627\u062D\u0629 \u0628\u0645\u062E\u062A\u0644\u0641 \u0623\u0634\u0643\u0627\u0644\u0647\u0627 \u0627\u0644\u062A\u064A \u064A\u0645\u0643\u0646 \u0644\u0645\u0639\u0627\u0644\u062C \u0645\u0627 (\u0648\u062D\u062F\u0629 \u0645\u0639\u0627\u0644\u062C\u0629 \u0645\u0631\u0643\u0632\u064A\u0629) \u0623\u0646 \u064A\u0642\u0648\u0645 \u0628\u062A\u0646\u0641\u064A\u0630\u0647\u0627. \u062A\u062A\u0636\u0645\u0646 \u0647\u0630\u0647 \u0627\u0644\u062A\u0639\u0644\u064A\u0645\u0627\u062A: \n* \u062A\u0639\u0644\u064A\u0645\u0627\u062A \u062D\u0633\u0627\u0628\u064A\u0629: \u0645\u062B\u0644 \u062A\u0639\u0644\u064A\u0645\u0627\u062A \u0627\u0644\u062C\u0645\u0639 \u0648\u0627\u0644\u0637\u0631\u062D \n* \u062A\u0639\u0644\u064A\u0645\u0627\u062A \u0645\u0646\u0637\u0642\u064A\u0629: \u0643\u062A\u0639\u0644\u064A\u0645\u0627\u062A \u0627\u0644\u0636\u0631\u0628 \u0627\u0644\u0645\u0646\u0637\u0642\u064A AND \u0648\u0627\u0644\u062C\u0645\u0639 \u0627\u0644\u0645\u0646\u0637\u0642\u064A OR \u0648\u0627\u0644\u0646\u0641\u064A \u0627\u0644\u0645\u0646\u0637\u0642\u064A NOT \n* \u062A\u0639\u0644\u064A\u0645\u0627\u062A \u0646\u0642\u0644 \u0627\u0644\u0645\u0639\u0637\u064A\u0627\u062A: \u0627\u0644\u062A\u064A \u062A\u0642\u0648\u0645 \u0628\u0646\u0642\u0644 \u0627\u0644\u0628\u064A\u0627\u0646\u0627\u062A \u0628\u064A\u0646 \u0627\u0644\u0633\u0640\u0651\u0640\u0650\u0640\u062C\u0640\u0640\u0650\u0640\u0644\u0627\u0651\u062A \u0627\u0644\u062F\u0627\u062E\u0644\u064A\u0629 \u0644\u0644\u0645\u0639\u0627\u0644\u062C \u0648\u0627\u0644\u0630\u0627\u0643\u0631\u0629 \u0623\u0648 \u0627\u0644\u0645\u0643\u062F\u0633 \u0623\u0648 \n* \u062A\u0639\u0644\u064A\u0645\u0627\u062A \u0627\u0644\u062A\u062D\u0643\u0645 \u0628\u0633\u064A\u0631 \u0627\u0644\u0628\u0631\u0646\u0627\u0645\u062C: \u0643\u062A\u0639\u0644\u064A\u0645\u0627\u062A \u0627\u0644\u0642\u0641\u0632 \u0627\u0644\u063A\u064A\u0631 \u0627\u0644\u0645\u0634\u0631\u0648\u0637 \u0648\u0627\u0644\u0642\u0641\u0632 \u0627\u0644\u0645\u0634\u0631\u0648\u0637 \u0648\u062A\u0639\u0644\u064A\u0645\u0627\u062A \u0627\u0633\u062A\u062F\u0639\u0627\u0621 \u0627\u0644\u0628\u0631\u0627\u0645\u062C \u0627\u0644\u0641\u0631\u0639\u064A\u0629 \u0648\u0627\u0644\u0639\u0648\u062F\u0629 \u0645\u0646\u0647\u0627 \u0625\u0646 \u0628\u0646\u064A\u0629 \u0645\u062C\u0645\u0648\u0639\u0629 \u0627\u0644\u062A\u0639\u0644\u064A\u0645\u0627\u062A (instruction set architecture) \u0647\u064A \u0627\u0644\u0642\u0633\u0645 \u0645\u0646 \u0628\u0646\u064A\u0629 \u0627\u0644\u062D\u0627\u0633\u0628 \u0627\u0644\u0645\u0631\u062A\u0628\u0637 \u0628\u0627\u0644\u0628\u0631\u0645\u062C\u0629 \u0628\u0627\u0633\u062A\u062E\u062F\u0627\u0645 \u0647\u0630\u0647 \u0627\u0644\u062A\u0639\u0644\u064A\u0645\u0627\u062A \u0648\u064A\u0634\u0645\u0644 \u0630\u0644\u0643 \u0627\u0644\u0645\u062F\u0639\u0648\u0645\u0629 \u0628\u0634\u0643\u0644 \u0645\u0628\u0627\u0634\u0631\u060C \u0627\u0644\u062A\u0639\u0644\u064A\u0645\u0627\u062A\u060C \u0627\u0644\u0633\u0640\u0651\u0640\u0650\u0640\u062C\u0640\u0640\u0650\u0640\u0644\u0627\u0651\u062A\u060C \u0623\u0646\u0645\u0627\u0637 \u0627\u0644\u0639\u0646\u0648\u0646\u0629\u060C \u062A\u0646\u0638\u064A\u0645 \u0627\u0644\u0630\u0627\u0643\u0631\u0629\u060C \u0627\u0644\u0645\u0642\u0627\u0637\u0639\u0627\u062A \u0648\u0645\u0639\u0627\u0644\u062C\u0629 \u0648\u0627\u0644\u062F\u062E\u0644/\u0627\u0644\u062E\u0631\u062C \u0645\u0639 \u0627\u0644\u0648\u0633\u0637 \u0627\u0644\u062E\u0627\u0631\u062C\u064A.\u0648\u0628\u0646\u064A\u0629 \u0645\u062C\u0645\u0648\u0639\u0629 \u0627\u0644\u062A\u0639\u0644\u064A\u0645\u0627\u062A \u062A\u062A\u0636\u0645\u0646 \u062A\u0641\u0635\u064A\u0644 \u0644\u0645\u062C\u0645\u0648\u0639\u0629 \u0645\u0646 (Op-codes) \u0648\u0647\u064A \u0627\u0644\u0623\u0648\u0627\u0645\u0631 \u0627\u0644\u0623\u0635\u0644\u064A\u0629 \u0627\u0644\u0645\u0646\u0641\u0630\u0629 \u0645\u0646 \u0642\u0628\u0644 \u062A\u0635\u0645\u064A\u0645 \u0645\u0639\u0627\u0644\u062C\u0627\u062A \u0645\u062D\u062F\u062F. \u0625\u0646 \u0628\u0646\u064A\u0629 \u0645\u062C\u0645\u0648\u0639\u0629 \u0627\u0644\u062A\u0639\u0644\u064A\u0645\u0627\u062A \u062A\u062E\u062A\u0644\u0641 \u0639\u0646 (microarchitecture) \u0648\u0627\u0644\u062A\u064A \u0647\u064A \u0639\u0628\u0627\u0631\u0629 \u0639\u0646 \u0645\u062C\u0645\u0648\u0639\u0629 \u0645\u0646 \u062A\u0642\u0646\u064A\u0627\u062A \u062A\u0635\u0645\u064A\u0645 \u0627\u0644\u0645\u0639\u0627\u0644\u062C\u0627\u062A \u0648\u0627\u0644\u0645\u0633\u062A\u062E\u062F\u0645\u0629 \u0644\u0625\u0646\u062C\u0627\u0632 \u0648\u062A\u062D\u0642\u064A\u0642 \u0645\u062C\u0645\u0648\u0639\u0629 \u0627\u0644\u062A\u0639\u0644\u064A\u0645\u0627\u062A. \u0641\u062D\u0648\u0627\u0633\u0628 \u0628\u0628\u0646\u0649 \u0645\u064A\u0643\u0631\u0648\u064A\u0629 \u0645\u062E\u062A\u0644\u0641\u0629 \u064A\u0645\u0643\u0646 \u0623\u0646 \u062A\u062A\u0634\u0627\u0631\u0643 \u0628\u0645\u062C\u0645\u0648\u0639\u0629 \u062A\u0639\u0644\u064A\u0645\u0627\u062A \u0645\u0634\u062A\u0631\u0643\u0629. \u0639\u0644\u0649 \u0633\u0628\u064A\u0644 \u0627\u0644\u0645\u062B\u0627\u0644 \u0645\u0639\u0627\u0644\u062C (Pentium) \u0645\u0646 \u0625\u0646\u062A\u0627\u062C \u0634\u0631\u0643\u0629 \u0625\u0646\u062A\u0644 (Intel) \u0648\u0645\u0639\u0627\u0644\u062C AMD Athlon \u064A\u0646\u0641\u0630\u0627\u0646 \u0646\u0633\u062E\u062A\u064A\u0646 \u0645\u062A\u0634\u0627\u0628\u0647\u062A\u064A\u0646 \u0625\u0644\u0649 \u062D\u062F \u0643\u0628\u064A\u0631 \u0645\u0646 \u0645\u062C\u0645\u0648\u0639\u0629 \u0627\u0644\u062A\u0639\u0644\u064A\u0645\u0627\u062A \u0627\u0644\u0645\u0633\u0645\u0627\u0629 x86 \u0648\u0644\u0643\u0646 \u064A\u0645\u0644\u0643\u0627\u0646 \u0628\u0646\u064A\u0629 \u0645\u064A\u0643\u0631\u0648\u064A\u0629 \u0645\u062E\u062A\u0644\u0641\u0629 \u0628\u0634\u0643\u0644 \u0643\u0628\u064A\u0631."@ar . "\u6307\u4EE4\u96C6\u67B6\u69CB"@zh . . . "Daftar ISA di bawah ini tidak dapat dikatakan komprehensif, mengingat banyaknya arsitektur lama yang tidak digunakan lagi saat ini atau adanya ISA yang baru dibuat oleh para desainer."@in . "Un conjunto de instrucciones, repertorio de instrucciones, juego de instrucciones o ISA (del ingl\u00E9s instruction set architecture, \u00ABarquitectura del conjunto de instrucciones\u00BB) es una especificaci\u00F3n que detalla las instrucciones que una unidad central de procesamiento puede entender y ejecutar, o el conjunto de todos los comandos implementados por un dise\u00F1o particular de una CPU. El t\u00E9rmino describe los aspectos del procesador generalmente visibles para un programador, incluidos los tipos de datos nativos, las instrucciones, los registros, la arquitectura de memoria y las interrupciones, entre otros aspectos."@es . . . . "In computer science, an instruction set architecture (ISA), also called computer architecture, is an abstract model of a computer. A device that executes instructions described by that ISA, such as a central processing unit (CPU), is called an implementation. In general, an ISA defines the supported instructions, data types, registers, the hardware support for managing main memory, fundamental features (such as the memory consistency, addressing modes, virtual memory), and the input/output model of a family of implementations of the ISA. An ISA specifies the behavior of machine code running on implementations of that ISA in a fashion that does not depend on the characteristics of that implementation, providing binary compatibility between implementations. This enables multiple implementations of an ISA that differ in characteristics such as performance, physical size, and monetary cost (among other things), but that are capable of running the same machine code, so that a lower-performance, lower-cost machine can be replaced with a higher-cost, higher-performance machine without having to replace software. It also enables the evolution of the microarchitectures of the implementations of that ISA, so that a newer, higher-performance implementation of an ISA can run software that runs on previous generations of implementations. If an operating system maintains a standard and compatible application binary interface (ABI) for a particular ISA, machine code will run on future implementations of that ISA and operating system. However, if an ISA supports running multiple operating systems, it does not guarantee that machine code for one operating system will run on another operating system, unless the first operating system supports running machine code built for the other operating system. An ISA can be extended by adding instructions or other capabilities, or adding support for larger addresses and data values; an implementation of the extended ISA will still be able to execute machine code for versions of the ISA without those extensions. Machine code using those extensions will only run on implementations that support those extensions. The binary compatibility that they provide makes ISAs one of the most fundamental abstractions in computing."@en . . . "\u6307\u4EE4\u96C6\u67B6\u69CB\uFF08\u82F1\u8A9E\uFF1AInstruction Set Architecture\uFF0C\u7E2E\u5BEB\u70BAISA\uFF09\uFF0C\u53C8\u7A31\u6307\u4EE4\u96C6\u6216\u6307\u4EE4\u96C6\u4F53\u7CFB\uFF0C\u662F\u8BA1\u7B97\u673A\u4F53\u7CFB\u7ED3\u6784\u4E2D\u8207\u7A0B\u5E8F\u8A2D\u8A08\u6709\u95DC\u7684\u90E8\u5206\uFF0C\u5305\u542B\u4E86\u57FA\u672C\u6570\u636E\u7C7B\u578B\uFF0C\u6307\u4EE4\u96C6\uFF0C\u5BC4\u5B58\u5668\uFF0C\u5BFB\u5740\u6A21\u5F0F\uFF0C\uFF0C\u4E2D\u65B7\uFF0C\u7570\u5E38\u8655\u7406\u4EE5\u53CA\u5916\u90E8I/O\u3002\u6307\u4EE4\u96C6\u67B6\u69CB\u5305\u542B\u4E00\u7CFB\u5217\u7684\u5373\u64CD\u4F5C\u7801\uFF08\u6A5F\u5668\u8A9E\u8A00\uFF09\uFF0C\u4EE5\u53CA\u7531\u7279\u5B9A\u8655\u7406\u5668\u6267\u884C\u7684\u57FA\u672C\u547D\u4EE4\u3002 \u4E0D\u540C\u7684\u5904\u7406\u5668\u201C\u5BB6\u65CF\u201D\u2014\u2014\u4F8B\u5982Intel IA-32\u548Cx86-64\u3001IBM/Freescale Power\u548CARM\u5904\u7406\u5668\u5BB6\u65CF\u2014\u2014\u6709\u4E0D\u540C\u7684\u6307\u4EE4\u96C6\u67B6\u6784\u3002 \u6307\u4EE4\u96C6\u4F53\u7CFB\u4E0E\u5FAE\u67B6\u6784\uFF08\u4E00\u5957\u7528\u4E8E\u6267\u884C\u6307\u4EE4\u96C6\u7684\u5FAE\u5904\u7406\u5668\u8BBE\u8BA1\u65B9\u6CD5\uFF09\u4E0D\u540C\u3002\u4F7F\u7528\u4E0D\u540C\u5FAE\u67B6\u69CB\u7684\u96FB\u8166\u53EF\u4EE5\u5171\u4EAB\u4E00\u79CD\u6307\u4EE4\u96C6\u3002\u4F8B\u5982\uFF0CIntel\u7684Pentium\u548CAMD\u7684AMD Athlon\uFF0C\u5169\u8005\u51E0\u4E4E\u63A1\u7528\u76F8\u540C\u7248\u672C\u7684x86\u6307\u4EE4\u96C6\u4F53\u7CFB\uFF0C\u4F46\u662F\u5169\u8005\u5728\u5185\u90E8\u8BBE\u8BA1\u4E0A\u6709\u672C\u8D28\u7684\u533A\u522B\u3002 \u4E00\u4E9B\u865B\u64EC\u6A5F\u5668\u652F\u6301\u57FA\u4E8ESmalltalk\uFF0CJava\u865B\u64EC\u6A5F\uFF0C\u5FAE\u8EDF\u7684\u516C\u5171\u8A9E\u8A00\u8FD0\u884C\u65F6\u865B\u64EC\u6A5F\u6240\u751F\u6210\u7684\u5B57\u8282\u7801\uFF0C\u4ED6\u5011\u7684\u6307\u4EE4\u96C6\u4F53\u7CFB\u5C07bytecode\uFF08\u5B57\u8282\u7801\uFF09\u4ECE\u4F5C\u4E3A\u4E00\u822C\u624B\u6BB5\u7684\u4EE3\u7801\u8DEF\u5F84\u7FFB\u8B6F\u6210\u672C\u5730\u7684\u6A5F\u5668\u8A9E\u8A00\uFF0C\u5E76\u901A\u8FC7\u89E3\u8BD1\u6267\u884C\u5E76\u4E0D\u5E38\u7528\u7684\u4EE3\u7801\u8DEF\u5F84\uFF0C\u5168\u7F8E\u9054\u4EE5\u76F8\u540C\u7684\u65B9\u5F0F\u5F00\u53D1\u4E86\u57FA\u4E8Ex86\u6307\u4EE4\u4F53\u7CFB\u7684VLIW\u8655\u7406\u5668\u3002"@zh . . . . . . . . . . . "\u547D\u4EE4\u30BB\u30C3\u30C8\uFF08\u3081\u3044\u308C\u3044\u305B\u3063\u3068\u3001instruction set\uFF09\u306F\u30D7\u30ED\u30BB\u30C3\u30B5\u547D\u4EE4\u306E\u96C6\u307E\u308A\u3067\u3042\u308B\u3002\u3059\u306A\u308F\u3061\u30B3\u30F3\u30D4\u30E5\u30FC\u30BF\u306E\u30CF\u30FC\u30C9\u30A6\u30A7\u30A2\u306B\u5BFE\u3057\u3066\u547D\u4EE4\u3092\u4F1D\u3048\u308B\u305F\u3081\u306E\u8A00\u8449\u306E\u8A9E\u5F59\u3067\u3042\u308B\u3002"@ja . . . . . "\u0410\u0440\u0445\u0438\u0442\u0435\u043A\u0442\u0443\u0440\u0430 \u043D\u0430\u0431\u043E\u0440\u0430 \u043A\u043E\u043C\u0430\u043D\u0434"@ru . . . "Un conjunt d'instruccions o repertori d'instruccions, joc d'instruccions o ISA (de l'angl\u00E8s Instruction Set Architecture, \u00ABArquitectura del Conjunt d'Instruccions\u00BB) \u00E9s una especificaci\u00F3 que detalla les instruccions que una CPU d'un ordinador pot entendre i executar, o el conjunt de tots els comandos implementats per un disseny particular d'una CPU. El terme descriu els aspectes del processador generalment visibles a un programador, incloent els tipus de dades natives, les instruccions, els registres, l'arquitectura de mem\u00F2ria i les interrupcions, entre altres aspectes."@ca . "En instruktionsupps\u00E4ttning eller ISA (fr\u00E5n engelskans Instruction Set Architecture) beskriver vilka tillg\u00E5ngar som finns tillg\u00E4ngliga f\u00F6r programmeringen av en processor. Bland annat beskrivs de instruktioner, register, adresseringsl\u00E4gen, minnesarkitektur och interrupthantering (avbrottshantering) som processorn st\u00F6der. Instruktionsupps\u00E4ttningen definierar \u00E4ven processorns maskinkod, dvs hur instruktionerna blir uttryckta som sekvenser av bin\u00E4ra ettor och nollor."@sv . . . . . "\u0410\u0440\u0445\u0456\u0442\u0435\u043A\u0442\u0443\u0301\u0440\u0430 \u0441\u0438\u0441\u0442\u0435\u0301\u043C\u0438 \u043A\u043E\u043C\u0430\u0301\u043D\u0434 (\u0430\u043D\u0433\u043B. instruction set architecture, ISA; \u0442\u0430\u043A\u043E\u0436 \u0441\u0438\u0441\u0442\u0435\u043C\u043D\u0430 \u0430\u0440\u0445\u0456\u0442\u0435\u043A\u0442\u0443\u0440\u0430) \u0435\u043B\u0435\u043A\u0442\u0440\u043E\u043D\u043D\u043E\u0457 \u043E\u0431\u0447\u0438\u0441\u043B\u044E\u0432\u0430\u043B\u044C\u043D\u043E\u0457 \u043C\u0430\u0448\u0438\u043D\u0438 \u2014 \u0441\u043A\u043B\u0430\u0434\u043E\u0432\u0430 \u0447\u0430\u0441\u0442\u0438\u043D\u0430 \u0430\u0440\u0445\u0456\u0442\u0435\u043A\u0442\u0443\u0440\u0438 \u043A\u043E\u043C\u043F'\u044E\u0442\u0435\u0440\u0430, \u0449\u043E \u043C\u0430\u0454 \u043D\u0430\u0441\u0442\u0443\u043F\u043D\u0456 \u0445\u0430\u0440\u0430\u043A\u0442\u0435\u0440\u0438\u0441\u0442\u0438\u043A\u0438: \n* \u043D\u0430\u0431\u0456\u0440 \u043C\u0430\u0448\u0438\u043D\u043D\u0438\u0445 \u043A\u043E\u043C\u0430\u043D\u0434 (\u0430\u0431\u043E \u043D\u0430\u0431\u0456\u0440 \u0456\u043D\u0441\u0442\u0440\u0443\u043A\u0446\u0456\u0439, \u0441\u0438\u0441\u0442\u0435\u043C\u0430 \u043A\u043E\u043C\u0430\u043D\u0434) \u2014 \u043F\u0435\u0440\u0435\u043B\u0456\u043A \u0442\u0430 \u0441\u0435\u043C\u0430\u043D\u0442\u0438\u043A\u0430 \u043E\u043F\u0435\u0440\u0430\u0446\u0456\u0439, \u044F\u043A\u0456 \u0437\u0434\u0430\u0442\u043D\u0438\u0439 \u0432\u0438\u043A\u043E\u043D\u0443\u0432\u0430\u0442\u0438 \u043A\u043E\u043C\u043F'\u044E\u0442\u0435\u0440; \n* \u0434\u043E\u0441\u0442\u0443\u043F\u043D\u0456 \u0440\u0435\u0433\u0456\u0441\u0442\u0440\u0438 \u2014 \u0432\u043D\u0443\u0442\u0440\u0456\u0448\u043D\u0456 \u043A\u043E\u043C\u0456\u0440\u043A\u0438 \u043F\u0430\u043C'\u044F\u0442\u0456 \u0446\u0435\u043D\u0442\u0440\u0430\u043B\u044C\u043D\u043E\u0433\u043E \u043F\u0440\u043E\u0446\u0435\u0441\u043E\u0440\u0430 (\u043F\u0440\u0438\u0441\u0442\u0440\u043E\u044E, \u044F\u043A\u0438\u0439 \u0432\u0438\u043A\u043E\u043D\u0443\u0454 \u043E\u0431\u0440\u043E\u0431\u043A\u0443 \u0456\u043D\u0444\u043E\u0440\u043C\u0430\u0446\u0456\u0457), \u0457\u0445 \u0444\u0443\u043D\u043A\u0446\u0456\u043E\u043D\u0430\u043B\u044C\u043D\u0435 \u043F\u0440\u0438\u0437\u043D\u0430\u0447\u0435\u043D\u043D\u044F, \u0440\u043E\u0437\u0440\u044F\u0434\u043D\u0456\u0441\u0442\u044C, \u043A\u0456\u043B\u044C\u043A\u0456\u0441\u0442\u044C \u0442\u043E\u0449\u043E; \n* \u0440\u043E\u0437\u0440\u044F\u0434\u043D\u0456\u0441\u0442\u044C \u0442\u0430 \u0444\u043E\u0440\u043C\u0430\u0442\u0438 \u043E\u043F\u0435\u0440\u0430\u043D\u0434\u0456\u0432 \u2014 \u043E\u0431'\u0454\u043A\u0442\u0456\u0432, \u043D\u0430\u0434 \u044F\u043A\u0438\u043C\u0438 \u0432\u0438\u043A\u043E\u043D\u0443\u044E\u0442\u044C\u0441\u044F \u043E\u043F\u0435\u0440\u0430\u0446\u0456\u0457; \n* \u0441\u043F\u043E\u0441\u043E\u0431\u0438 \u0430\u0434\u0440\u0435\u0441\u0430\u0446\u0456\u0457 \u043F\u0430\u043C'\u044F\u0442\u0456 \u2014 \u043C\u0435\u0442\u043E\u0434\u0438 \u0434\u043E\u0441\u0442\u0443\u043F\u0443 \u0434\u043E \u043E\u043F\u0435\u0440\u0430\u043D\u0434\u0456\u0432, \u044F\u043A\u0456 \u0437\u0431\u0435\u0440\u0456\u0433\u0430\u044E\u0442\u044C\u0441\u044F \u0432 \u043F\u0430\u043C'\u044F\u0442\u0456; \n* \u043E\u0441\u043E\u0431\u043B\u0438\u0432\u043E\u0441\u0442\u0456 \u043E\u0431\u0440\u043E\u0431\u043A\u0438 \u0432\u0438\u043D\u044F\u0442\u043A\u043E\u0432\u0438\u0445 \u0441\u0438\u0442\u0443\u0430\u0446\u0456\u0439; \n* \u043E\u0431\u0440\u043E\u0431\u043A\u0430 \u043F\u0435\u0440\u0435\u0440\u0438\u0432\u0430\u043D\u044C."@uk . . . . . . . . . . . . . . . . . . . . . . . . . "Instruk\u010Dn\u00ED sada (anglicky instruction set architecture, zkratka ISA), ozna\u010Dovan\u00E1 tak\u00E9 jako architektura, je obecn\u00FD popis organiza\u010Dn\u00EDch, funk\u010Dn\u00EDch a provozn\u00EDch princip\u016F procesoru, z pohledu program\u00E1tora je to seznam dostupn\u00FDch mechanism\u016F pro programov\u00E1n\u00ED. Programov\u00FD model procesoru se m\u016F\u017Ee skl\u00E1dat nap\u0159\u00EDklad z n\u00E1sleduj\u00EDc\u00EDch prvk\u016F: \n* seznamu instrukc\u00ED procesoru \n* datov\u00FDch typ\u016F \n* dostupn\u00FDch re\u017Eim\u016F, je\u017E jsou k dispozici \n* seznamu registr\u016F \n* pravidel pro manipulaci s v\u00FDjimkami a p\u0159eru\u0161en\u00EDmi"@cs . . "Conjunto de instrucciones"@es . . . "Le jeu d'instructions est l'ensemble des instructions-machine qu'un processeur d'ordinateur peut ex\u00E9cuter. Ces instructions-machines permettent d'effectuer des op\u00E9rations \u00E9l\u00E9mentaires (addition, ET logique\u2026) ou plus complexes (division, passage en mode basse consommation\u2026). Le jeu d'instructions d\u00E9finit quelles sont les instructions support\u00E9es par le processeur. Le jeu d'instructions pr\u00E9cise aussi quels sont les registres du processeur manipulables par le programmeur (les registres architecturaux)."@fr . . "\u547D\u4EE4\u30BB\u30C3\u30C8\uFF08\u3081\u3044\u308C\u3044\u305B\u3063\u3068\u3001instruction set\uFF09\u306F\u30D7\u30ED\u30BB\u30C3\u30B5\u547D\u4EE4\u306E\u96C6\u307E\u308A\u3067\u3042\u308B\u3002\u3059\u306A\u308F\u3061\u30B3\u30F3\u30D4\u30E5\u30FC\u30BF\u306E\u30CF\u30FC\u30C9\u30A6\u30A7\u30A2\u306B\u5BFE\u3057\u3066\u547D\u4EE4\u3092\u4F1D\u3048\u308B\u305F\u3081\u306E\u8A00\u8449\u306E\u8A9E\u5F59\u3067\u3042\u308B\u3002"@ja . . "\u0391\u03C1\u03C7\u03B9\u03C4\u03B5\u03BA\u03C4\u03BF\u03BD\u03B9\u03BA\u03AE \u03C3\u03C5\u03BD\u03CC\u03BB\u03BF\u03C5 \u03B5\u03BD\u03C4\u03BF\u03BB\u03CE\u03BD"@el . . . . . "Daftar ISA di bawah ini tidak dapat dikatakan komprehensif, mengingat banyaknya arsitektur lama yang tidak digunakan lagi saat ini atau adanya ISA yang baru dibuat oleh para desainer."@in . "33017"^^ . "\u0645\u062C\u0645\u0648\u0639\u0629 \u0627\u0644\u062A\u0639\u0644\u064A\u0645\u0627\u062A"@ar . "Instruk\u010Dn\u00ED sada (anglicky instruction set architecture, zkratka ISA), ozna\u010Dovan\u00E1 tak\u00E9 jako architektura, je obecn\u00FD popis organiza\u010Dn\u00EDch, funk\u010Dn\u00EDch a provozn\u00EDch princip\u016F procesoru, z pohledu program\u00E1tora je to seznam dostupn\u00FDch mechanism\u016F pro programov\u00E1n\u00ED. Programov\u00FD model procesoru se m\u016F\u017Ee skl\u00E1dat nap\u0159\u00EDklad z n\u00E1sleduj\u00EDc\u00EDch prvk\u016F: \n* seznamu instrukc\u00ED procesoru \n* datov\u00FDch typ\u016F \n* dostupn\u00FDch re\u017Eim\u016F, je\u017E jsou k dispozici \n* seznamu registr\u016F \n* pravidel pro manipulaci s v\u00FDjimkami a p\u0159eru\u0161en\u00EDmi"@cs . . . . . . "\u547D\u4EE4\u30BB\u30C3\u30C8"@ja . . . . "Instruk\u010Dn\u00ED sada"@cs . "Een instructieset is de verzameling van alle mogelijke machinecodes die een processor kan verwerken. De instructies worden als binaire codes in het geheugen gezet, het programmeren zelf gebeurt in assembleertalen of (meestal) hogere programmeertalen. De meeste moderne processors hebben een zeer uitgebreide instructieset, waarbij een enkele instructie meerdere functies kan uitvoeren. Bijvoorbeeld: \"haal de waarde op die op de geheugenplaats staat die door register X wordt aangewezen, tel deze op bij de waarde in het werkregister en laat register X naar de volgende geheugenplaats wijzen\". Iedere processorfamilie heeft over het algemeen een eigen instructieset die niet uitwisselbaar is met die van andere. Dit betekent dat programma's die voor een bepaald processortype gemaakt zijn niet zonder meer op een ander type kunnen werken. Met hercompileren, emulators of kan dit probleem ondervangen worden."@nl . "\uBA85\uB839\uC5B4 \uC9D1\uD569(\uC601\uC5B4: instruction set) \uB610\uB294 \uBA85\uB839\uC5B4 \uC9D1\uD569 \uAD6C\uC870(\uC601\uC5B4: Instruction set architecture, ISA)\uB294 \uB9C8\uC774\uD06C\uB85C\uD504\uB85C\uC138\uC11C\uAC00 \uC778\uC2DD\uD574\uC11C \uAE30\uB2A5\uC744 \uC774\uD574\uD558\uACE0 \uC2E4\uD589\uD560 \uC218 \uC788\uB294 \uAE30\uACC4\uC5B4 \uBA85\uB839\uC5B4\uB97C \uB9D0\uD55C\uB2E4. \uB9C8\uC774\uD06C\uB85C\uD504\uB85C\uC138\uC11C\uB9C8\uB2E4 \uAE30\uACC4\uC5B4 \uCF54\uB4DC\uC758 \uAE38\uC774\uC640 \uC22B\uC790 \uCF54\uB4DC\uAC00 \uB2E4\uB974\uB2E4. \uBA85\uB839\uC5B4\uC758 \uAC01 \uBE44\uD2B8\uB294 \uAE30\uB2A5\uC801\uC73C\uB85C \uBD84\uD560\uD558\uC5EC \uC758\uBBF8\uB97C \uBD80\uC5EC\uD558\uACE0 \uC22B\uC790\uD654\uD55C\uB2E4. \uD504\uB85C\uADF8\uB7A8 \uAC1C\uBC1C\uC790\uAC00 \uC22B\uC790\uB85C \uD504\uB85C\uADF8\uB7A8\uD558\uAE30\uAC00 \uBD88\uD3B8\uD558\uBBC0\uB85C \uAE30\uACC4\uC5B4\uC640 \uC77C\uB300\uC77C\uB85C \uBB38\uC790\uD654\uD55C \uAC83\uC774 \uC5B4\uC148\uBE14\uB9AC\uC5B4\uC774\uB2E4. \uCD5C\uD558\uC704 \uB808\uBCA8\uC758 \uD504\uB85C\uADF8\uB798\uBC0D \uC778\uD130\uD398\uC774\uC2A4\uB85C, \uD504\uB85C\uC138\uC11C\uAC00 \uC2E4\uD589\uD560 \uC218 \uC788\uB294 \uBAA8\uB4E0 \uBA85\uB839\uC5B4\uB4E4\uC744 \uD3EC\uD568\uD55C\uB2E4. \uBA85\uB839\uC5B4 \uC9D1\uD569, \uACE7 \uBA85\uB839\uC5B4 \uC9D1\uD569 \uAD6C\uC870\uB294 \uC790\uB8CC\uD615, , \uB808\uC9C0\uC2A4\uD130, , , \uC778\uD130\uB7FD\uD2B8, \uC608\uC678 \uCC98\uB9AC, \uC678\uBD80 \uC785\uCD9C\uB825\uC744 \uD3EC\uD568\uD55C \uD504\uB85C\uADF8\uB798\uBC0D \uAD00\uB828 \uCEF4\uD4E8\uD130 \uC544\uD0A4\uD14D\uCC98\uC758 \uC77C\uBD80\uC774\uB2E4. ISA\uB294 \uD2B9\uC815\uD55C CPU \uB514\uC790\uC778\uC73C\uB85C \uCD94\uAC00\uB41C \uC21C\uC218 \uBA85\uB839\uC5B4\uC778 opcode\uC758 \uC9D1\uD569 \uADDC\uACA9(\uAE30\uACC4\uC5B4)\uC744 \uD3EC\uD568\uD55C\uB2E4."@ko . . . . "Instruction set"@it . . . . . . . . . . . .