. "DDR3 SDRAM"@cs . . . . . . . "Double Data Rate 3 Synchronous Dynamic Random-Access Memory"@en . . . . . . "DDR3 SDRAM, Double Data Rate (Three) Synchronous Dynamic Random Access Memory, \u00E4r en Random Access Memory standard som anv\u00E4nds som arbetsminne i m\u00E5nga typer av datorbaserade apparater och annan datoriserad utrustning."@sv . . "DDR3 SDRAM (de las siglas en ingl\u00E9s, Double Data Rate type three Synchronous Dynamic Random-Access Memory) es un tipo de memoria RAM, de la familia de las SDRAM usadas desde principios de 2011.\u200B\u200B"@es . . "2572735"^^ . "DDR3 SDRAM"@sv . "Double Data Rate 3 Synchronous Dynamic Random-Access Memory (DDR3 SDRAM) is a type of synchronous dynamic random-access memory (SDRAM) with a high bandwidth (\"double data rate\") interface, and has been in use since 2007. It is the higher-speed successor to DDR and DDR2 and predecessor to DDR4 synchronous dynamic random-access memory (SDRAM) chips. DDR3 SDRAM is neither forward nor backward compatible with any earlier type of random-access memory (RAM) because of different signaling voltages, timings, and other factors. DDR3 is a DRAM interface specification. The actual DRAM arrays that store the data are similar to earlier types, with similar performance. The primary benefit of DDR3 SDRAM over its immediate predecessor DDR2 SDRAM, is its ability to transfer data at twice the rate (eight times the speed of its internal memory arrays), enabling higher bandwidth or peak data rates. The DDR3 standard permits DRAM chip capacities of up to 8 gigabits (Gbit), and up to four ranks of 64 bits each for a total maximum of 16 gigabytes (GB) per DDR3 DIMM. Because of a hardware limitation not fixed until Ivy Bridge-E in 2013, most older Intel CPUs only support up to 4-Gbit chips for 8 GB DIMMs (Intel's Core 2 DDR3 chipsets only support up to 2 Gbit). All AMD CPUs correctly support the full specification for 16 GB DDR3 DIMMs."@en . . . . . . "1120563547"^^ . "Physical comparison of DDR, DDR2, and DDR3 SDRAM"@en . . . . . "Double Data Rate 3 Synchronous Dynamic Random-Access Memory (mem\u00F3ria de acesso aleat\u00F3rio din\u00E2mica s\u00EDncrona com fluxo de dados duplo tipo 3, DDR3 SDRAM) \u00E9 um tipo de mem\u00F3ria de acesso aleat\u00F3rio din\u00E2mica s\u00EDncrona (SDRAM) com uma interface de alta largura de banda (\"taxa de dados dupla\") e est\u00E1 em uso desde 2007. \u00C9 o sucessor de alta velocidade para DDR e DDR2 e predecessor para chips de mem\u00F3ria din\u00E2mica de acesso aleat\u00F3rio s\u00EDncrono (SDRAM) DDR4. DDR3 SDRAM n\u00E3o \u00E9 nem para a frente nem para tr\u00E1s compat\u00EDvel com qualquer tipo antes de mem\u00F3ria de acesso aleat\u00F3rio (RAM) por causa de tens\u00F5es diferentes de sinaliza\u00E7\u00E3o, clock e outros fatores."@pt . "DDR3 SDRAM \u00E9s un tipus de mem\u00F2ria RAM, que en angl\u00E8s significa Double Data Rate tipus 3 Synchronous Dynamic Random-Access Memory. La mem\u00F2ria DDR2 \u00E9s la predecessora de les mem\u00F2ries DDR3. La mem\u00F2ria redueix el consum de pot\u00E8ncia comparat amb els m\u00F2duls DDR2, degut a la tecnologia de fabricaci\u00F3 de 90 nm, permetent menors corrents i voltatges (un m\u00E0xim de 1,5V, comparat amb els 1,8V de DDR2 o els 2,5V de DDR) d'operaci\u00F3. Es fan servir transistors de \"doble porta\" per reduir les p\u00E8rdues de corrent. L'ample del buffer de pre-c\u00E0rrega de DDR3 \u00E9s de 8 bits, mentre que a DDR2 \u00E9s de 4 bits, i a DDR \u00E9s de 2 bits."@ca . "vertical"@en . "DDR3 SDRAM (\u0432\u0456\u0434 \u0430\u043D\u0433\u043B. Double Data Rate 3 Synchronous Dynamic Random Access Memory \u2014 \u0441\u0438\u043D\u0445\u0440\u043E\u043D\u043D\u0430 \u0434\u0438\u043D\u0430\u043C\u0456\u0447\u043D\u0430 \u043F\u0430\u043C'\u044F\u0442\u044C \u0456\u0437 \u0434\u043E\u0432\u0456\u043B\u044C\u043D\u0438\u043C \u0434\u043E\u0441\u0442\u0443\u043F\u043E\u043C \u0442\u0430 \u043F\u043E\u0434\u0432\u043E\u0454\u043D\u043E\u044E \u0448\u0432\u0438\u0434\u043A\u0456\u0441\u0442\u044E \u043F\u0435\u0440\u0435\u0434\u0430\u0447\u0456 \u0434\u0430\u043D\u0438\u0445, \u0442\u0440\u0435\u0442\u0454 \u043F\u043E\u043A\u043E\u043B\u0456\u043D\u043D\u044F) \u2014 \u0446\u0435 \u0442\u0438\u043F \u043E\u043F\u0435\u0440\u0430\u0442\u0438\u0432\u043D\u043E\u0457 \u043F\u0430\u043C'\u044F\u0442\u0456, \u0449\u043E \u0432\u0438\u043A\u043E\u0440\u0438\u0441\u0442\u043E\u0432\u0443\u0454\u0442\u044C\u0441\u044F \u0432 \u043E\u0431\u0447\u0438\u0441\u043B\u044E\u0432\u0430\u043B\u044C\u043D\u0456\u0439 \u0442\u0435\u0445\u043D\u0456\u0446\u0456 \u044F\u043A \u043E\u043F\u0435\u0440\u0430\u0442\u0438\u0432\u043D\u0430 \u0442\u0430 \u0432\u0456\u0434\u0435\u043E- \u043F\u0430\u043C'\u044F\u0442\u044C. \u041F\u0440\u0438\u0439\u0448\u043B\u0430 \u043D\u0430 \u0437\u043C\u0456\u043D\u0443 \u043F\u0430\u043C'\u044F\u0442\u0456 \u0442\u0438\u043F\u0443 DDR2 SDRAM. \u0412 DDR3 \u0437\u043C\u0435\u043D\u0448\u0435\u043D\u043E \u043D\u0430 40% \u0441\u043F\u043E\u0436\u0438\u0432\u0430\u043D\u043D\u044F \u0435\u043D\u0435\u0440\u0433\u0456\u0457 \u043F\u043E\u0440\u0456\u0432\u043D\u044F\u043D\u043E \u0437 \u043C\u043E\u0434\u0443\u043B\u044F\u043C\u0438 DDR2 SDRAM, \u0449\u043E \u043E\u0431\u0443\u043C\u043E\u0432\u043B\u0435\u043D\u043E \u0437\u043C\u0435\u043D\u0448\u0435\u043D\u043E\u044E (1,5 \u0412, \u0432 \u043F\u043E\u0440\u0456\u0432\u043D\u044F\u043D\u043D\u0456 \u0437 1,8 \u0412 \u0434\u043B\u044F DDR2 SDRAM \u0442\u0430 2,5 \u0412 \u0434\u043B\u044F DDR-SDRAM) \u043D\u0430\u043F\u0440\u0443\u0433\u043E\u044E \u0436\u0438\u0432\u043B\u0435\u043D\u043D\u044F \u0433\u043D\u0456\u0437\u0434 \u043F\u0430\u043C'\u044F\u0442\u0456."@uk . "DDR3 SDRAM"@in . . "400"^^ . "\u062F\u064A \u062F\u064A \u0622\u0631 3 \u0625\u0633 \u062F\u064A \u0631\u0627\u0645"@ar . "DDR3 SDRAM (\u0430\u043D\u0433\u043B. double-data-rate three synchronous dynamic random access memory \u2014 \u0441\u0438\u043D\u0445\u0440\u043E\u043D\u043D\u0430\u044F \u0434\u0438\u043D\u0430\u043C\u0438\u0447\u0435\u0441\u043A\u0430\u044F \u043F\u0430\u043C\u044F\u0442\u044C \u0441 \u043F\u0440\u043E\u0438\u0437\u0432\u043E\u043B\u044C\u043D\u044B\u043C \u0434\u043E\u0441\u0442\u0443\u043F\u043E\u043C \u0438 \u0443\u0434\u0432\u043E\u0435\u043D\u043D\u043E\u0439 \u0441\u043A\u043E\u0440\u043E\u0441\u0442\u044C\u044E \u043F\u0435\u0440\u0435\u0434\u0430\u0447\u0438 \u0434\u0430\u043D\u043D\u044B\u0445, \u0442\u0440\u0435\u0442\u044C\u0435 \u043F\u043E\u043A\u043E\u043B\u0435\u043D\u0438\u0435) \u2014 \u0442\u0438\u043F \u043E\u043F\u0435\u0440\u0430\u0442\u0438\u0432\u043D\u043E\u0439 \u043F\u0430\u043C\u044F\u0442\u0438, \u0438\u0441\u043F\u043E\u043B\u044C\u0437\u0443\u0435\u043C\u043E\u0439 \u0432 \u0432\u044B\u0447\u0438\u0441\u043B\u0438\u0442\u0435\u043B\u044C\u043D\u043E\u0439 \u0442\u0435\u0445\u043D\u0438\u043A\u0435 \u0432 \u043A\u0430\u0447\u0435\u0441\u0442\u0432\u0435 \u043E\u043F\u0435\u0440\u0430\u0442\u0438\u0432\u043D\u043E\u0439 \u0438 \u0432\u0438\u0434\u0435\u043E\u043F\u0430\u043C\u044F\u0442\u0438.\u041F\u0440\u0438\u0448\u043B\u0430 \u043D\u0430 \u0441\u043C\u0435\u043D\u0443 \u043F\u0430\u043C\u044F\u0442\u0438 \u0442\u0438\u043F\u0430 DDR2 SDRAM, \u0443\u0432\u0435\u043B\u0438\u0447\u0438\u0432 \u0440\u0430\u0437\u043C\u0435\u0440 \u043F\u0440\u0435\u0434\u043F\u043E\u0434\u043A\u0430\u0447\u043A\u0438 \u0441 4 \u0431\u0438\u0442 \u0434\u043E 8 \u0431\u0438\u0442. \u0423 DDR3 \u0443\u043C\u0435\u043D\u044C\u0448\u0435\u043D\u043E \u043F\u043E\u0442\u0440\u0435\u0431\u043B\u0435\u043D\u0438\u0435 \u044D\u043D\u0435\u0440\u0433\u0438\u0438 \u043F\u043E \u0441\u0440\u0430\u0432\u043D\u0435\u043D\u0438\u044E \u0441 \u043C\u043E\u0434\u0443\u043B\u044F\u043C\u0438 DDR2, \u0447\u0442\u043E \u043E\u0431\u0443\u0441\u043B\u043E\u0432\u043B\u0435\u043D\u043E \u043F\u043E\u043D\u0438\u0436\u0435\u043D\u043D\u044B\u043C (1,5 \u0412, \u043F\u043E \u0441\u0440\u0430\u0432\u043D\u0435\u043D\u0438\u044E \u0441 1,8 \u0412 \u0434\u043B\u044F DDR2 \u0438 2,5 \u0412 \u0434\u043B\u044F DDR) \u043D\u0430\u043F\u0440\u044F\u0436\u0435\u043D\u0438\u0435\u043C \u043F\u0438\u0442\u0430\u043D\u0438\u044F \u044F\u0447\u0435\u0435\u043A \u043F\u0430\u043C\u044F\u0442\u0438. \u0421\u043D\u0438\u0436\u0435\u043D\u0438\u0435 \u043D\u0430\u043F\u0440\u044F\u0436\u0435\u043D\u0438\u044F \u043F\u0438\u0442\u0430\u043D\u0438\u044F \u0434\u043E\u0441\u0442\u0438\u0433\u0430\u0435\u0442\u0441\u044F \u0437\u0430 \u0441\u0447\u0451\u0442 \u0438\u0441\u043F\u043E\u043B\u044C\u0437\u043E\u0432\u0430\u043D\u0438\u044F \u0431\u043E\u043B\u0435\u0435 \u0442\u043E\u043D\u043A\u043E\u0433\u043E \u0442\u0435\u0445\u043F\u0440\u043E\u0446\u0435\u0441\u0441\u0430 (\u0432\u043D\u0430\u0447\u0430\u043B\u0435 \u2014 90 \u043D\u043C, \u0432 \u0434\u0430\u043B\u044C\u043D\u0435\u0439\u0448\u0435\u043C \u2014 65, 50, 40 \u043D\u043C) \u043F\u0440\u0438 \u043F\u0440\u043E\u0438\u0437\u0432\u043E\u0434\u0441\u0442\u0432\u0435 \u043C\u0438\u043A\u0440\u043E\u0441\u0445\u0435\u043C \u0438 \u043F\u0440\u0438\u043C\u0435\u043D\u0435\u043D\u0438\u044F \u0442\u0440\u0430\u043D\u0437\u0438\u0441\u0442\u043E\u0440\u043E\u0432 \u0441 \u0434\u0432\u043E\u0439\u043D\u044B\u043C \u0437\u0430\u0442\u0432\u043E\u0440\u043E\u043C Dual-gate (\u0447\u0442\u043E \u0441\u043F\u043E\u0441\u043E\u0431\u0441\u0442\u0432\u0443\u0435\u0442 \u0441\u043D\u0438\u0436\u0435\u043D\u0438\u044E \u0442\u043E\u043A\u043E\u0432 \u0443\u0442\u0435\u0447\u043A\u0438). \u0421\u0443\u0449\u0435\u0441\u0442\u0432\u0443\u0435\u0442 \u0432\u0430\u0440\u0438\u0430\u043D\u0442 \u043F\u0430\u043C\u044F\u0442\u0438 DDR3L (L \u043E\u0437\u043D\u0430\u0447\u0430\u0435\u0442 Low Voltage) \u0441 \u0435\u0449\u0451 \u0431\u043E\u043B\u0435\u0435 \u043D\u0438\u0437\u043A\u0438\u043C \u043D\u0430\u043F\u0440\u044F\u0436\u0435\u043D\u0438\u0435\u043C \u043F\u0438\u0442\u0430\u043D\u0438\u044F, 1,35 \u0412, \u0447\u0442\u043E \u043C\u0435\u043D\u044C\u0448\u0435 \u0442\u0440\u0430\u0434\u0438\u0446\u0438\u043E\u043D\u043D\u043E\u0433\u043E \u0434\u043B\u044F DDR3 \u043D\u0430 10 %. \u0422\u0430\u043A\u0436\u0435 \u0441\u0443\u0449\u0435\u0441\u0442\u0432\u0443\u0435\u0442 \u043C\u043E\u0434\u0443\u043B\u0438 \u043F\u0430\u043C\u044F\u0442\u0438 DDR3U (U \u043E\u0437\u043D\u0430\u0447\u0430\u0435\u0442 Ultra Low Voltage) \u0441 \u043D\u0430\u043F\u0440\u044F\u0436\u0435\u043D\u0438\u0435\u043C \u043F\u0438\u0442\u0430\u043D\u0438\u044F 1,25 \u0412, \u0447\u0442\u043E \u0435\u0449\u0451 \u043D\u0430 10 % \u043C\u0435\u043D\u044C\u0448\u0435, \u0447\u0435\u043C \u043F\u0440\u0438\u043D\u044F\u0442\u043E\u0435 \u0434\u043B\u044F DDR3L. \u0424\u0438\u043D\u0430\u043B\u044C\u043D\u0430\u044F \u0441\u043F\u0435\u0446\u0438\u0444\u0438\u043A\u0430\u0446\u0438\u044F \u043D\u0430 \u0432\u0441\u0435 \u0442\u0440\u0438 \u0440\u0430\u0437\u043D\u043E\u0432\u0438\u0434\u043D\u043E\u0441\u0442\u0438 (DDR3, DDR3L, DDR3U) \u0431\u044B\u043B\u0430 \u043E\u043F\u0443\u0431\u043B\u0438\u043A\u043E\u0432\u0430\u043D\u0430 \u043D\u0430 \u0441\u0430\u0439\u0442\u0435 JEDEC \u0432 \u0434\u0435\u043A\u0430\u0431\u0440\u0435 2010 \u0441 \u0434\u043E\u043F\u043E\u043B\u043D\u0435\u043D\u0438\u044F\u043C\u0438, \u043A\u0430\u0441\u0430\u044E\u0449\u0438\u043C\u0438\u0441\u044F \u0441\u0442\u0430\u043D\u0434\u0430\u0440\u0442\u043E\u0432 DDR3U-800, DDR3U-1066, DDR3U-1333, \u0430 \u0442\u0430\u043A\u0436\u0435 DDR3U-1600 (\u0432 \u043E\u043A\u0442\u044F\u0431\u0440\u0435 2011). \u0422\u0438\u043F\u0438\u0447\u043D\u044B\u0435 \u043E\u0431\u044A\u0451\u043C\u044B \u043E\u0431\u044B\u0447\u043D\u044B\u0445 \u043C\u043E\u0434\u0443\u043B\u0435\u0439 \u043F\u0430\u043C\u044F\u0442\u0438 DDR3 \u0441\u043E\u0441\u0442\u0430\u0432\u043B\u044F\u044E\u0442 \u043E\u0442 1 \u0413\u0411 \u0434\u043E 16 \u0413\u0411.\u0412 \u0432\u0438\u0434\u0435 SO-DIMM \u043E\u0431\u044B\u0447\u043D\u043E \u0440\u0435\u0430\u043B\u0438\u0437\u0443\u044E\u0442\u0441\u044F \u043C\u043E\u0434\u0443\u043B\u0438 \u0451\u043C\u043A\u043E\u0441\u0442\u044C\u044E \u0434\u043E 8 \u0413\u0411; \u0441 2013 \u0433\u043E\u0434\u0430 \u0432\u044B\u043F\u0443\u0441\u043A\u0430\u044E\u0442\u0441\u044F \u043C\u043E\u0434\u0443\u043B\u0438 SO-DIMM 16 \u0413\u0411, \u043D\u043E \u043E\u043D\u0438 \u0440\u0435\u0434\u043A\u0438 \u0438 \u0438\u043C\u0435\u044E\u0442 \u043E\u0433\u0440\u0430\u043D\u0438\u0447\u0435\u043D\u043D\u0443\u044E \u0441\u043E\u0432\u043C\u0435\u0441\u0442\u0438\u043C\u043E\u0441\u0442\u044C. \u0421\u0430\u043C\u0438 \u043C\u0438\u043A\u0440\u043E\u0441\u0445\u0435\u043C\u044B \u043F\u0430\u043C\u044F\u0442\u0438 DDR3 \u043F\u0440\u043E\u0438\u0437\u0432\u043E\u0434\u044F\u0442\u0441\u044F \u0438\u0441\u043A\u043B\u044E\u0447\u0438\u0442\u0435\u043B\u044C\u043D\u043E \u0432 \u043A\u043E\u0440\u043F\u0443\u0441\u0430\u0445 \u0442\u0438\u043F\u0430 BGA."@ru . ""@en . . . "Double Data Rate 3 Synchronous Dynamic Random-Access Memory (mem\u00F3ria de acesso aleat\u00F3rio din\u00E2mica s\u00EDncrona com fluxo de dados duplo tipo 3, DDR3 SDRAM) \u00E9 um tipo de mem\u00F3ria de acesso aleat\u00F3rio din\u00E2mica s\u00EDncrona (SDRAM) com uma interface de alta largura de banda (\"taxa de dados dupla\") e est\u00E1 em uso desde 2007. \u00C9 o sucessor de alta velocidade para DDR e DDR2 e predecessor para chips de mem\u00F3ria din\u00E2mica de acesso aleat\u00F3rio s\u00EDncrono (SDRAM) DDR4. DDR3 SDRAM n\u00E3o \u00E9 nem para a frente nem para tr\u00E1s compat\u00EDvel com qualquer tipo antes de mem\u00F3ria de acesso aleat\u00F3rio (RAM) por causa de tens\u00F5es diferentes de sinaliza\u00E7\u00E3o, clock e outros fatores. DDR3 \u00E9 uma especifica\u00E7\u00E3o de interface DRAM. As matrizes DRAM reais que armazenam os dados s\u00E3o semelhantes aos tipos anteriores, com desempenho semelhante. O principal benef\u00EDcio do DDR3 SDRAM sobre seu predecessor imediato, DDR2 SDRAM, \u00E9 sua capacidade de transferir dados com o dobro da taxa (oito vezes a velocidade de seus arrays de mem\u00F3ria interna), permitindo maior largura de banda ou taxas de pico de dados. O padr\u00E3o DDR3 permite capacidade de chips DRAM de at\u00E9 8 gigabits (Gbit) e at\u00E9 quatro classifica\u00E7\u00F5es de 64 bits cada para um m\u00E1ximo total de 16 gigabytes (GB) por DIMM DDR3. Por causa de uma limita\u00E7\u00E3o de hardware n\u00E3o corrigida at\u00E9 Ivy Bridge-E em 2013, a maioria das CPUs Intel mais antigas suportam apenas chips de at\u00E9 4 Gbit para DIMMs de 8 GB (os chipsets Core 2 DDR3 da Intel suportam apenas 2 Gbit). Todas as CPUs AMD suportam corretamente a especifica\u00E7\u00E3o completa para DIMMs DDR3 de 16 GB."@pt . . . . . "DDR3 SDRAM (Double-Data-Rate3 Synchronous Dynamic Random Access Memory) \u306F\u534A\u5C0E\u4F53\u96C6\u7A4D\u56DE\u8DEF\u3067\u69CB\u6210\u3055\u308C\u308BDRAM\u306E\u898F\u683C\u306E\u4E00\u7A2E\u3067\u3042\u308B\u3002 2007\u5E74\u9803\u304B\u3089\u30D1\u30FC\u30BD\u30CA\u30EB\u30B3\u30F3\u30D4\u30E5\u30FC\u30BF\u306E\u4E3B\u8A18\u61B6\u88C5\u7F6E\u306A\u3069\u306B\u7528\u3044\u3089\u308C\u308B\u3088\u3046\u306B\u306A\u308A\u30012010\u5E74\u5F8C\u534A\u307E\u3067\u5E02\u5834\u306E\u4E3B\u6D41\u3068\u3057\u3066\u5404\u7A2E\u30C7\u30D0\u30A4\u30B9\u3067\u7528\u3044\u3089\u308C\u305F\u3002\u30B9\u30DE\u30FC\u30C8\u30C7\u30D0\u30A4\u30B9\u306A\u3069\u306E\u7D44\u307F\u8FBC\u307F\u5411\u3051\u3068\u3057\u3066\u3082\u30012013\u5E74\u4EE5\u964D\u306E\u9AD8\u6027\u80FD\u54C1\uFF08ARM Cortex-A15\u306A\u3069\uFF09\u306B\u4F7F\u308F\u308C\u308B\u3088\u3046\u306B\u306A\u3063\u305F\u3002\u30A4\u30F3\u30C6\u30EB\u306FNehalem\u30DE\u30A4\u30AF\u30ED\u30A2\u30FC\u30AD\u30C6\u30AF\u30C1\u30E3\uFF082008\u5E74\uFF09\u304B\u3089\u4F7F\u7528\u3057\u3066\u3044\u308B\u3002"@ja . . "DDR3 SDRAM (Double-Data-Rate3 Synchronous Dynamic Random Access Memory) \u306F\u534A\u5C0E\u4F53\u96C6\u7A4D\u56DE\u8DEF\u3067\u69CB\u6210\u3055\u308C\u308BDRAM\u306E\u898F\u683C\u306E\u4E00\u7A2E\u3067\u3042\u308B\u3002 2007\u5E74\u9803\u304B\u3089\u30D1\u30FC\u30BD\u30CA\u30EB\u30B3\u30F3\u30D4\u30E5\u30FC\u30BF\u306E\u4E3B\u8A18\u61B6\u88C5\u7F6E\u306A\u3069\u306B\u7528\u3044\u3089\u308C\u308B\u3088\u3046\u306B\u306A\u308A\u30012010\u5E74\u5F8C\u534A\u307E\u3067\u5E02\u5834\u306E\u4E3B\u6D41\u3068\u3057\u3066\u5404\u7A2E\u30C7\u30D0\u30A4\u30B9\u3067\u7528\u3044\u3089\u308C\u305F\u3002\u30B9\u30DE\u30FC\u30C8\u30C7\u30D0\u30A4\u30B9\u306A\u3069\u306E\u7D44\u307F\u8FBC\u307F\u5411\u3051\u3068\u3057\u3066\u3082\u30012013\u5E74\u4EE5\u964D\u306E\u9AD8\u6027\u80FD\u54C1\uFF08ARM Cortex-A15\u306A\u3069\uFF09\u306B\u4F7F\u308F\u308C\u308B\u3088\u3046\u306B\u306A\u3063\u305F\u3002\u30A4\u30F3\u30C6\u30EB\u306FNehalem\u30DE\u30A4\u30AF\u30ED\u30A2\u30FC\u30AD\u30C6\u30AF\u30C1\u30E3\uFF082008\u5E74\uFF09\u304B\u3089\u4F7F\u7528\u3057\u3066\u3044\u308B\u3002"@ja . "DDR3 SDRAM (ang. Double Data Rate Synchronous Dynamic Random Access Memory (version 3)) \u2013 standard pami\u0119ci RAM typu SDRAM, b\u0119d\u0105cy rozwini\u0119ciem pami\u0119ci DDR i DDR2, stosowanych w komputerach jako pami\u0119\u0107 operacyjna. Standard jest zdefiniowany w dokumencie \u201EJEDEC Standard No. 79-3E\u201D. Pami\u0119\u0107 DDR3 wykonywana jest w technologii 90 nm lub mniejszej, co umo\u017Cliwia zastosowanie ni\u017Cszego napi\u0119cia (1,5 V w por\u00F3wnaniu z 1,8 V dla DDR2 i 2,5 V dla DDR). Dzi\u0119ki temu pami\u0119\u0107 DDR3 charakteryzuje si\u0119 zmniejszonym poborem mocy o oko\u0142o 40% w stosunku do pami\u0119ci DDR2 oraz wi\u0119ksz\u0105 przepustowo\u015Bci\u0105 w por\u00F3wnaniu do DDR2 i DDR. Istniej\u0105 tak\u017Ce niskonapi\u0119ciowe modu\u0142y DDR3L zasilane napi\u0119ciem 1,35 V oraz DDR3U zasilane napi\u0119ciem 1,2 V zdefiniowane w dokumentach \u201EJEDEC Standard No. 79-3-1A.01\u201D (DDR3L) oraz \u201EJEDEC Standard No. 79-3-2\u201D (DDR3U). Pami\u0119ci DDR3 nie s\u0105 kompatybilne wstecz, tzn. nie wsp\u00F3\u0142pracuj\u0105 z chipsetami obs\u0142uguj\u0105cymi DDR i DDR2. Modu\u0142y z pami\u0119ci\u0105 DIMM DDR3 maj\u0105 przesuni\u0119te wci\u0119cie w praw\u0105 stron\u0119 w stosunku do modu\u0142\u00F3w DIMM DDR2. Obs\u0142uga pami\u0119ci DDR3 przez procesory zosta\u0142a wprowadzona w 2007 roku w chipsetach p\u0142yt g\u0142\u00F3wnych przeznaczonych dla procesor\u00F3w Intel oraz w 2009 roku w procesorach firmy AMD. Pami\u0119ci DDR3 wyst\u0119puj\u0105 w modu\u0142ach o pojemno\u015Bci od 512 MB do 16 GB."@pl . "Le DDR3 SDRAM, plus g\u00E9n\u00E9ralement connu sous la forme simplifi\u00E9e DDR3, est un standard de m\u00E9moire vive dynamique \u00E9lectronique d\u00E9fini par le JEDEC, destin\u00E9 \u00E0 \u00EAtre progressivement utilis\u00E9 dans les ordinateurs personnels commercialis\u00E9s \u00E0 partir de l\u2019ann\u00E9e 2007."@fr . "3"^^ . . . "DDR3 SDRAM"@en . "Three long green circuit boards, identical in size, but each with a notch in a different location"@en . "DDR3-800"@en . . . "(\u0628\u0627\u0644\u0625\u0646\u062C\u0644\u064A\u0632\u064A\u0629: DDR3 SDRAM)\u200F \u0648\u0647\u064A \u0627\u062E\u062A\u0635\u0627\u0631 \u0644\u0636\u0639\u0641 \u0645\u0639\u062F\u0644 \u0646\u0642\u0644 \u0627\u0644\u0628\u064A\u0627\u0646\u0627\u062A \u0627\u0644\u0646\u0648\u0639 3 \u0625\u0633 \u062F\u064A \u0631\u0627\u0645 \u0647\u064A \u0646\u0648\u0639 \u0645\u0646 \u0630\u0627\u0643\u0631\u0629 \u0627\u0644\u0648\u0635\u0648\u0644 \u0627\u0644\u0639\u0634\u0648\u0627\u0626\u064A \u0627\u0644\u062F\u064A\u0646\u0627\u0645\u064A\u0643\u064A \u0627\u0644\u0645\u062A\u0632\u0627\u0645\u0646 (SDRAM) \u0645\u0639 \u0639\u0631\u0636 \u0646\u0637\u0627\u0642 \u062A\u0631\u062F\u062F\u064A \u0639\u0627\u0644\u064A (\"\u0645\u0639\u062F\u0644 \u0628\u064A\u0627\u0646\u0627\u062A \u0645\u0632\u062F\u0648\u062C\")\u060C \u0648\u0647\u064A \u0642\u064A\u062F \u0627\u0644\u0627\u0633\u062A\u062E\u062F\u0627\u0645 \u0645\u0646\u0630 \u0639\u0627\u0645 2007. \u0647\u0648 \u0627\u0644\u062E\u0644\u0641 \u0623\u0639\u0644\u0649 \u0633\u0631\u0639\u0629 \u0648\u062F\u064A \u062F\u064A \u0622\u0631 2 DDR2 \u0648\u0627\u0644\u0633\u0627\u0628\u0642 \u0644\u062F\u064A \u062F\u064A \u0622\u0631 4 DDR4 \u060C \u062F\u064A \u062F\u064A \u0622\u0631 3 \u0644\u064A\u0633 \u0645\u062A\u0648\u0627\u0641\u0642 \u0645\u0639 \u0623\u064A \u0646\u0648\u0639 \u0633\u0627\u0628\u0642 \u0623\u0648 \u0644\u0627\u062D\u0642 \u0645\u0646 \u0630\u0627\u0643\u0631\u0629 \u0627\u0644\u0648\u0635\u0648\u0644 \u0627\u0644\u0639\u0634\u0648\u0627\u0626\u064A (RAM) \u0628\u0633\u0628\u0628 \u0627\u0644\u0641\u0648\u0644\u062A\u064A\u0629 \u0644\u0644\u0625\u0634\u0627\u0631\u0627\u062A \u0627\u0644\u0645\u062E\u062A\u0644\u0641\u0629\u060C \u0648\u0627\u0644\u062A\u0648\u0642\u064A\u062A\u060C \u0648\u0639\u0648\u0627\u0645\u0644 \u0623\u062E\u0631\u0649. \u062F\u064A \u062F\u064A \u0622\u0631 3 \u0625\u0633 \u062F\u064A \u0631\u0627\u0645 \u0647\u064A \u0645\u0645\u0627\u062B\u0644\u0629 \u0644\u0623\u0646\u0648\u0627\u0639 \u0633\u0627\u0628\u0642\u0629\u060C \u0645\u0639 \u0623\u062F\u0627\u0621 \u0645\u0645\u0627\u062B\u0644."@ar . "\uC804\uC790 \uACF5\uD559\uC5D0\uC11C DDR3 SDRAM\uC740 \uCEF4\uD4E8\uD130\uC640 \uB2E4\uB978 \uB514\uC9C0\uD138 \uD68C\uB85C \uC7A5\uCE58\uC5D0\uC11C \uB370\uC774\uD130\uB97C \uBE60\uB974\uAC8C \uCC98\uB9AC\uD558\uB294 \uB370 \uC4F0\uC774\uB294 \uB7A8 \uAE30\uC220\uC774\uB2E4. \uB514\uB7A8 \uAC00\uC6B4\uB370 \uD558\uB098\uC778 SDRAM\uACC4 \uAE30\uC220\uC758 \uC77C\uBD80\uC774\uBA70, \uC774\uC804 \uAE30\uC220\uC778 DDR2 SDRAM \uC81C\uD488\uBCF4\uB2E4 \uB3D9\uC791\uC18D\uB3C4, \uC804\uB825\uC18C\uBAA8 \uB4F1\uC774 \uB6F0\uC5B4\uB098\uB2E4. \uC0BC\uC131\uC804\uC790\uAC00 2005\uB144 \uC5C5\uACC4\uCD5C\uCD08\uB85C \uAC1C\uBC1C\uD558\uC600\uB2E4. DDR3\uC758 \uC8FC\uB41C \uC774\uC810\uC740 \uC785\uCD9C\uB825 \uBC84\uC2A4\uB97C \uBA54\uBAA8\uB9AC \uC140\uC758 \uC18D\uB3C4\uBCF4\uB2E4 4\uBC30\uB098 \uBE60\uB974\uAC8C \uB3D9\uC791\uD560 \uC218 \uC788\uB2E4\uB294 \uC810\uC774\uBA70, \uC774\uB85C\uC368 \uC774\uC804\uC758 \uBA54\uBAA8\uB9AC \uAE30\uC220\uBCF4\uB2E4 \uB354 \uBE60\uB978 \uBC84\uC2A4 \uC18D\uB3C4\uB97C \uAD6C\uD604\uD560 \uC218 \uC788\uB2E4. \uB2E4\uB9CC \uB354 \uBE60\uB978 \uBC84\uC2A4 \uC18D\uB3C4\uC640 \uC2A4\uB8E8\uD48B\uC740 \uB97C \uB298\uB9AC\uB294 \uACB0\uACFC\uB97C \uB0B3\uC544 \uC804\uBC18\uC801\uC778 \uC18D\uB3C4\uAC00 \uB5A8\uC5B4\uC9C8 \uC218 \uC788\uB2E4. \uB610\uD55C, DDR3\uC740 512 \uBA54\uAC00\uBE44\uD2B8\uBD80\uD130 8 \uAE30\uAC00\uBE44\uD2B8\uAE4C\uC9C0\uC758 \uCE69 \uC6A9\uB7C9\uC744 \uD45C\uC900\uC73C\uB85C \uC9C0\uC815\uD574 \uB193\uACE0 \uC788\uB2E4. \uB530\uB77C\uC11C \uCD5C\uB300 16 \uAE30\uAC00\uBC14\uC774\uD2B8\uC758 \uBA54\uBAA8\uB9AC \uBAA8\uB4C8\uC744 \uC0AC\uC6A9\uD560 \uC218 \uC788\uB2E4."@ko . . . . "Reference 1.5 V"@en . . "DDR3 SDRAM (\u0432\u0456\u0434 \u0430\u043D\u0433\u043B. Double Data Rate 3 Synchronous Dynamic Random Access Memory \u2014 \u0441\u0438\u043D\u0445\u0440\u043E\u043D\u043D\u0430 \u0434\u0438\u043D\u0430\u043C\u0456\u0447\u043D\u0430 \u043F\u0430\u043C'\u044F\u0442\u044C \u0456\u0437 \u0434\u043E\u0432\u0456\u043B\u044C\u043D\u0438\u043C \u0434\u043E\u0441\u0442\u0443\u043F\u043E\u043C \u0442\u0430 \u043F\u043E\u0434\u0432\u043E\u0454\u043D\u043E\u044E \u0448\u0432\u0438\u0434\u043A\u0456\u0441\u0442\u044E \u043F\u0435\u0440\u0435\u0434\u0430\u0447\u0456 \u0434\u0430\u043D\u0438\u0445, \u0442\u0440\u0435\u0442\u0454 \u043F\u043E\u043A\u043E\u043B\u0456\u043D\u043D\u044F) \u2014 \u0446\u0435 \u0442\u0438\u043F \u043E\u043F\u0435\u0440\u0430\u0442\u0438\u0432\u043D\u043E\u0457 \u043F\u0430\u043C'\u044F\u0442\u0456, \u0449\u043E \u0432\u0438\u043A\u043E\u0440\u0438\u0441\u0442\u043E\u0432\u0443\u0454\u0442\u044C\u0441\u044F \u0432 \u043E\u0431\u0447\u0438\u0441\u043B\u044E\u0432\u0430\u043B\u044C\u043D\u0456\u0439 \u0442\u0435\u0445\u043D\u0456\u0446\u0456 \u044F\u043A \u043E\u043F\u0435\u0440\u0430\u0442\u0438\u0432\u043D\u0430 \u0442\u0430 \u0432\u0456\u0434\u0435\u043E- \u043F\u0430\u043C'\u044F\u0442\u044C. \u041F\u0440\u0438\u0439\u0448\u043B\u0430 \u043D\u0430 \u0437\u043C\u0456\u043D\u0443 \u043F\u0430\u043C'\u044F\u0442\u0456 \u0442\u0438\u043F\u0443 DDR2 SDRAM. \u0412 DDR3 \u0437\u043C\u0435\u043D\u0448\u0435\u043D\u043E \u043D\u0430 40% \u0441\u043F\u043E\u0436\u0438\u0432\u0430\u043D\u043D\u044F \u0435\u043D\u0435\u0440\u0433\u0456\u0457 \u043F\u043E\u0440\u0456\u0432\u043D\u044F\u043D\u043E \u0437 \u043C\u043E\u0434\u0443\u043B\u044F\u043C\u0438 DDR2 SDRAM, \u0449\u043E \u043E\u0431\u0443\u043C\u043E\u0432\u043B\u0435\u043D\u043E \u0437\u043C\u0435\u043D\u0448\u0435\u043D\u043E\u044E (1,5 \u0412, \u0432 \u043F\u043E\u0440\u0456\u0432\u043D\u044F\u043D\u043D\u0456 \u0437 1,8 \u0412 \u0434\u043B\u044F DDR2 SDRAM \u0442\u0430 2,5 \u0412 \u0434\u043B\u044F DDR-SDRAM) \u043D\u0430\u043F\u0440\u0443\u0433\u043E\u044E \u0436\u0438\u0432\u043B\u0435\u043D\u043D\u044F \u0433\u043D\u0456\u0437\u0434 \u043F\u0430\u043C'\u044F\u0442\u0456."@uk . "DDR3-1066"@en . . . . . "DDR3 SDRAM"@ja . . "DDR3 \u00E8 lo standard di memorie RAM sviluppato come successore delle memorie DDR2. L'arrivo sul mercato \u00E8 avvenuto nel corso del 2007 ad opera di Intel che ne ha offerto pieno supporto con il proprio chipset Bearlake. AMD lo ha adottato solo nel febbraio 2009."@it . . . . . . "(\u0628\u0627\u0644\u0625\u0646\u062C\u0644\u064A\u0632\u064A\u0629: DDR3 SDRAM)\u200F \u0648\u0647\u064A \u0627\u062E\u062A\u0635\u0627\u0631 \u0644\u0636\u0639\u0641 \u0645\u0639\u062F\u0644 \u0646\u0642\u0644 \u0627\u0644\u0628\u064A\u0627\u0646\u0627\u062A \u0627\u0644\u0646\u0648\u0639 3 \u0625\u0633 \u062F\u064A \u0631\u0627\u0645 \u0647\u064A \u0646\u0648\u0639 \u0645\u0646 \u0630\u0627\u0643\u0631\u0629 \u0627\u0644\u0648\u0635\u0648\u0644 \u0627\u0644\u0639\u0634\u0648\u0627\u0626\u064A \u0627\u0644\u062F\u064A\u0646\u0627\u0645\u064A\u0643\u064A \u0627\u0644\u0645\u062A\u0632\u0627\u0645\u0646 (SDRAM) \u0645\u0639 \u0639\u0631\u0636 \u0646\u0637\u0627\u0642 \u062A\u0631\u062F\u062F\u064A \u0639\u0627\u0644\u064A (\"\u0645\u0639\u062F\u0644 \u0628\u064A\u0627\u0646\u0627\u062A \u0645\u0632\u062F\u0648\u062C\")\u060C \u0648\u0647\u064A \u0642\u064A\u062F \u0627\u0644\u0627\u0633\u062A\u062E\u062F\u0627\u0645 \u0645\u0646\u0630 \u0639\u0627\u0645 2007. \u0647\u0648 \u0627\u0644\u062E\u0644\u0641 \u0623\u0639\u0644\u0649 \u0633\u0631\u0639\u0629 \u0648\u062F\u064A \u062F\u064A \u0622\u0631 2 DDR2 \u0648\u0627\u0644\u0633\u0627\u0628\u0642 \u0644\u062F\u064A \u062F\u064A \u0622\u0631 4 DDR4 \u060C \u062F\u064A \u062F\u064A \u0622\u0631 3 \u0644\u064A\u0633 \u0645\u062A\u0648\u0627\u0641\u0642 \u0645\u0639 \u0623\u064A \u0646\u0648\u0639 \u0633\u0627\u0628\u0642 \u0623\u0648 \u0644\u0627\u062D\u0642 \u0645\u0646 \u0630\u0627\u0643\u0631\u0629 \u0627\u0644\u0648\u0635\u0648\u0644 \u0627\u0644\u0639\u0634\u0648\u0627\u0626\u064A (RAM) \u0628\u0633\u0628\u0628 \u0627\u0644\u0641\u0648\u0644\u062A\u064A\u0629 \u0644\u0644\u0625\u0634\u0627\u0631\u0627\u062A \u0627\u0644\u0645\u062E\u062A\u0644\u0641\u0629\u060C \u0648\u0627\u0644\u062A\u0648\u0642\u064A\u062A\u060C \u0648\u0639\u0648\u0627\u0645\u0644 \u0623\u062E\u0631\u0649. \u062F\u064A \u062F\u064A \u0622\u0631 3 \u0625\u0633 \u062F\u064A \u0631\u0627\u0645 \u0647\u064A \u0645\u0645\u0627\u062B\u0644\u0629 \u0644\u0623\u0646\u0648\u0627\u0639 \u0633\u0627\u0628\u0642\u0629\u060C \u0645\u0639 \u0623\u062F\u0627\u0621 \u0645\u0645\u0627\u062B\u0644."@ar . . . . . . "DDR3 SDRAM"@zh . . . . . "DDR3 SDRAM, Double Data Rate (Three) Synchronous Dynamic Random Access Memory, \u00E4r en Random Access Memory standard som anv\u00E4nds som arbetsminne i m\u00E5nga typer av datorbaserade apparater och annan datoriserad utrustning."@sv . "Desktop PCs"@en . . . . . . . "\uC804\uC790 \uACF5\uD559\uC5D0\uC11C DDR3 SDRAM\uC740 \uCEF4\uD4E8\uD130\uC640 \uB2E4\uB978 \uB514\uC9C0\uD138 \uD68C\uB85C \uC7A5\uCE58\uC5D0\uC11C \uB370\uC774\uD130\uB97C \uBE60\uB974\uAC8C \uCC98\uB9AC\uD558\uB294 \uB370 \uC4F0\uC774\uB294 \uB7A8 \uAE30\uC220\uC774\uB2E4. \uB514\uB7A8 \uAC00\uC6B4\uB370 \uD558\uB098\uC778 SDRAM\uACC4 \uAE30\uC220\uC758 \uC77C\uBD80\uC774\uBA70, \uC774\uC804 \uAE30\uC220\uC778 DDR2 SDRAM \uC81C\uD488\uBCF4\uB2E4 \uB3D9\uC791\uC18D\uB3C4, \uC804\uB825\uC18C\uBAA8 \uB4F1\uC774 \uB6F0\uC5B4\uB098\uB2E4. \uC0BC\uC131\uC804\uC790\uAC00 2005\uB144 \uC5C5\uACC4\uCD5C\uCD08\uB85C \uAC1C\uBC1C\uD558\uC600\uB2E4. DDR3\uC758 \uC8FC\uB41C \uC774\uC810\uC740 \uC785\uCD9C\uB825 \uBC84\uC2A4\uB97C \uBA54\uBAA8\uB9AC \uC140\uC758 \uC18D\uB3C4\uBCF4\uB2E4 4\uBC30\uB098 \uBE60\uB974\uAC8C \uB3D9\uC791\uD560 \uC218 \uC788\uB2E4\uB294 \uC810\uC774\uBA70, \uC774\uB85C\uC368 \uC774\uC804\uC758 \uBA54\uBAA8\uB9AC \uAE30\uC220\uBCF4\uB2E4 \uB354 \uBE60\uB978 \uBC84\uC2A4 \uC18D\uB3C4\uB97C \uAD6C\uD604\uD560 \uC218 \uC788\uB2E4. \uB2E4\uB9CC \uB354 \uBE60\uB978 \uBC84\uC2A4 \uC18D\uB3C4\uC640 \uC2A4\uB8E8\uD48B\uC740 \uB97C \uB298\uB9AC\uB294 \uACB0\uACFC\uB97C \uB0B3\uC544 \uC804\uBC18\uC801\uC778 \uC18D\uB3C4\uAC00 \uB5A8\uC5B4\uC9C8 \uC218 \uC788\uB2E4. \uB610\uD55C, DDR3\uC740 512 \uBA54\uAC00\uBE44\uD2B8\uBD80\uD130 8 \uAE30\uAC00\uBE44\uD2B8\uAE4C\uC9C0\uC758 \uCE69 \uC6A9\uB7C9\uC744 \uD45C\uC900\uC73C\uB85C \uC9C0\uC815\uD574 \uB193\uACE0 \uC788\uB2E4. \uB530\uB77C\uC11C \uCD5C\uB300 16 \uAE30\uAC00\uBC14\uC774\uD2B8\uC758 \uBA54\uBAA8\uB9AC \uBAA8\uB4C8\uC744 \uC0AC\uC6A9\uD560 \uC218 \uC788\uB2E4."@ko . . "DDR3-1600"@en . . "DDR3 SDRAM"@ko . ""@en . . "DDR3 SDRAM"@fr . "\u7B2C\u4E09\u4EE3\u96D9\u500D\u8CC7\u6599\u7387\u540C\u6B65\u52D5\u614B\u96A8\u6A5F\u5B58\u53D6\u8A18\u61B6\u9AD4\uFF08Double-Data-Rate Three Synchronous Dynamic Random Access Memory\uFF0C\u4E00\u822C\u7A31\u70BADDR3 SDRAM\uFF09\uFF0C\u662F\u4E00\u7A2E\u96FB\u8166\u8A18\u61B6\u9AD4\u898F\u683C\u3002\u5B83\u5C6C\u65BCSDRAM\u5BB6\u65CF\u7684\u8A18\u61B6\u9AD4\u7522\u54C1\uFF0C\u63D0\u4F9B\u76F8\u8F03\u65BCDDR2 SDRAM\u66F4\u9AD8\u7684\u904B\u884C\u6548\u80FD\u8207\u66F4\u4F4E\u7684\u96FB\u58D3\uFF0C\u662FDDR2 SDRAM\uFF08\u56DB\u500D\u8CC7\u6599\u7387\u540C\u6B65\u52D5\u614B\u96A8\u6A5F\u5B58\u53D6\u8A18\u61B6\u9AD4\uFF09\u7684\u5F8C\u7E7C\u8005\uFF08\u589E\u52A0\u81F3\u516B\u500D\uFF09\u3002"@zh . . . . . . . . . "31962"^^ . . . "DDR3 SDRAM (anglicky double-data-rate 3 SDRAM) byl typ opera\u010Dn\u00ED pam\u011Bti pro po\u010D\u00EDta\u010De zve\u0159ejn\u011Bn\u00FD organizac\u00ED JEDEC v roce 2007, ale prodeje p\u0159ekonaly p\u0159edchoz\u00ED generaci DDR2 SDRAM a\u017E v roce 2010. Vzestup prodej\u016F byl d\u00EDky nov\u00FDm procesor\u016Fm Intel Core i7 (vy\u017Eadoval DDR3) a AMD Phenom II (doporu\u010Doval DDR3). DDR3 nen\u00ED zp\u011Btn\u011B kompatibiln\u00ED s DDR2 ani dop\u0159edn\u011B kompatibiln\u00ED s DDR4, p\u0159esto\u017Ee tak\u00E9 pou\u017E\u00EDv\u00E1 pouzdro DIMM (rozd\u00EDly jsou v nap\u00E1jen\u00ED, signalizaci, \u010Dasov\u00E1n\u00ED apod.)."@cs . . . . . "\u7B2C\u4E09\u4EE3\u96D9\u500D\u8CC7\u6599\u7387\u540C\u6B65\u52D5\u614B\u96A8\u6A5F\u5B58\u53D6\u8A18\u61B6\u9AD4\uFF08Double-Data-Rate Three Synchronous Dynamic Random Access Memory\uFF0C\u4E00\u822C\u7A31\u70BADDR3 SDRAM\uFF09\uFF0C\u662F\u4E00\u7A2E\u96FB\u8166\u8A18\u61B6\u9AD4\u898F\u683C\u3002\u5B83\u5C6C\u65BCSDRAM\u5BB6\u65CF\u7684\u8A18\u61B6\u9AD4\u7522\u54C1\uFF0C\u63D0\u4F9B\u76F8\u8F03\u65BCDDR2 SDRAM\u66F4\u9AD8\u7684\u904B\u884C\u6548\u80FD\u8207\u66F4\u4F4E\u7684\u96FB\u58D3\uFF0C\u662FDDR2 SDRAM\uFF08\u56DB\u500D\u8CC7\u6599\u7387\u540C\u6B65\u52D5\u614B\u96A8\u6A5F\u5B58\u53D6\u8A18\u61B6\u9AD4\uFF09\u7684\u5F8C\u7E7C\u8005\uFF08\u589E\u52A0\u81F3\u516B\u500D\uFF09\u3002"@zh . . . "DDR3 SDRAM"@uk . . . . "DDR3 SDRAM"@es . . . . "DDR3 SDRAM (\u0430\u043D\u0433\u043B. double-data-rate three synchronous dynamic random access memory \u2014 \u0441\u0438\u043D\u0445\u0440\u043E\u043D\u043D\u0430\u044F \u0434\u0438\u043D\u0430\u043C\u0438\u0447\u0435\u0441\u043A\u0430\u044F \u043F\u0430\u043C\u044F\u0442\u044C \u0441 \u043F\u0440\u043E\u0438\u0437\u0432\u043E\u043B\u044C\u043D\u044B\u043C \u0434\u043E\u0441\u0442\u0443\u043F\u043E\u043C \u0438 \u0443\u0434\u0432\u043E\u0435\u043D\u043D\u043E\u0439 \u0441\u043A\u043E\u0440\u043E\u0441\u0442\u044C\u044E \u043F\u0435\u0440\u0435\u0434\u0430\u0447\u0438 \u0434\u0430\u043D\u043D\u044B\u0445, \u0442\u0440\u0435\u0442\u044C\u0435 \u043F\u043E\u043A\u043E\u043B\u0435\u043D\u0438\u0435) \u2014 \u0442\u0438\u043F \u043E\u043F\u0435\u0440\u0430\u0442\u0438\u0432\u043D\u043E\u0439 \u043F\u0430\u043C\u044F\u0442\u0438, \u0438\u0441\u043F\u043E\u043B\u044C\u0437\u0443\u0435\u043C\u043E\u0439 \u0432 \u0432\u044B\u0447\u0438\u0441\u043B\u0438\u0442\u0435\u043B\u044C\u043D\u043E\u0439 \u0442\u0435\u0445\u043D\u0438\u043A\u0435 \u0432 \u043A\u0430\u0447\u0435\u0441\u0442\u0432\u0435 \u043E\u043F\u0435\u0440\u0430\u0442\u0438\u0432\u043D\u043E\u0439 \u0438 \u0432\u0438\u0434\u0435\u043E\u043F\u0430\u043C\u044F\u0442\u0438.\u041F\u0440\u0438\u0448\u043B\u0430 \u043D\u0430 \u0441\u043C\u0435\u043D\u0443 \u043F\u0430\u043C\u044F\u0442\u0438 \u0442\u0438\u043F\u0430 DDR2 SDRAM, \u0443\u0432\u0435\u043B\u0438\u0447\u0438\u0432 \u0440\u0430\u0437\u043C\u0435\u0440 \u043F\u0440\u0435\u0434\u043F\u043E\u0434\u043A\u0430\u0447\u043A\u0438 \u0441 4 \u0431\u0438\u0442 \u0434\u043E 8 \u0431\u0438\u0442. \u0421\u0430\u043C\u0438 \u043C\u0438\u043A\u0440\u043E\u0441\u0445\u0435\u043C\u044B \u043F\u0430\u043C\u044F\u0442\u0438 DDR3 \u043F\u0440\u043E\u0438\u0437\u0432\u043E\u0434\u044F\u0442\u0441\u044F \u0438\u0441\u043A\u043B\u044E\u0447\u0438\u0442\u0435\u043B\u044C\u043D\u043E \u0432 \u043A\u043E\u0440\u043F\u0443\u0441\u0430\u0445 \u0442\u0438\u043F\u0430 BGA."@ru . "DDR3 SDRAM (bahasa Inggris: Double Data Rate type 3 Synchronous Dynamic Random Access Memory) adalah istilah komputasi yang ditujukan pada jenis modern dari \"Memori Akses Acak Dinamis\" (bahasa Inggris: Dynamic Random Access Memory) (DRAM) dengan antarmuka yang menggunakan lebar pita tinggi, dan telah digunakan sejak 2007. DDR3 SDRAM tidak kompatibel ke depan maupun ke belakang dengan semua jenis Memori Akses Acak terdahulu manapun, karena perbedaan tegangan pensinyalan, waktu, dan faktor lain. DDR3 adalah spesifikasi antarmuka dari DRAM. Susunan dari penyimpanan data DRAM sama dengan tipe terdahulu, dengan kinerja yang sama. Keunggulan utama DDR3 SDRAM dibandingkan pendahulunya, DDR2 SDRAM, adalah kemampuannya untuk mengantarkan data dua kali lebih cepat (delapan kali kecepatan susunan memori internal), memungkinkan lebar pita (bandwidth) yang lebih besar. Dengan dua transfer tiap putaran dari sinyal clock yang dikalikan empat, modul DDR3 selebar 64-bit dapat mencapai kecepatan transfer hingga 64 kali kecepatan clock memori dalam megabita per detik (MB/detik). Dengan data yang dikirimkan adalah 64 bit pada satu waktu tiap modul memori, DDR3 SDRAM memberikan kecepatan transfer (kecepatan clock memori) x 4 (untuk pengali clock bus) x 2 (untuk kecepatan data) x 64 (jumlah bit yang dikirimkan) / 8 (jumlah bit/bita). Jadi, dengan frekuensi clock memori 100 MHz, DDR3 SDRAM memberikan kecepatan transfer maksimum 6400 MB/detik. Sebagai tambahan, standar DDR3 mengizinkan kapasitas kepingan (chip) sampai dengan 8 gigabita."@in . . . . . . "DDR3 SDRAM \u00E9s un tipus de mem\u00F2ria RAM, que en angl\u00E8s significa Double Data Rate tipus 3 Synchronous Dynamic Random-Access Memory. La mem\u00F2ria DDR2 \u00E9s la predecessora de les mem\u00F2ries DDR3. La mem\u00F2ria redueix el consum de pot\u00E8ncia comparat amb els m\u00F2duls DDR2, degut a la tecnologia de fabricaci\u00F3 de 90 nm, permetent menors corrents i voltatges (un m\u00E0xim de 1,5V, comparat amb els 1,8V de DDR2 o els 2,5V de DDR) d'operaci\u00F3. Es fan servir transistors de \"doble porta\" per reduir les p\u00E8rdues de corrent. L'ample del buffer de pre-c\u00E0rrega de DDR3 \u00E9s de 8 bits, mentre que a DDR2 \u00E9s de 4 bits, i a DDR \u00E9s de 2 bits. Les mem\u00F2ries DDR3 permeten utilitzar xips integrats que van des de 512 Mb fins a 8 Gb, fent possible la fabricaci\u00F3 de m\u00F2duls de fins a 16 Gb. Aquests m\u00F2duls poden transferir dades a la velocitat de rellotge efectiva de 800-1600 MHz (per a un sol amplada de banda de rellotge de 400-800 MHz), comparat amb el rang de DDR2, de 400-1066 MHz (200-533 MHz) o el rang de DDR, de 200-600 MHz (100-300 MHz). Totes les mem\u00F2ries DDR3 tenen 240 pins, el mateix nombre que DDR2; tot i aix\u00F2, els m\u00F2duls s\u00F3n f\u00EDsicament incompatibles, a causa de la ubicaci\u00F3 diferent de l'osca. A totes les mem\u00F2ries DDR haurien de venir indicada la lat\u00E8ncia o temps de resposta, indicat amb l'\u00EDndex CL (7,8,9 fins a 11). Com a refer\u00E8ncia gen\u00E8rica a un \u00EDndex CL mes baix mes r\u00E0pida es la resposta,sempre mesurada en cicles de BUS. (Aix\u00F2 implica que en temps reals (Nanosegons) l'acc\u00E9s a les dades es mes r\u00E0pid en un CL9 a 1333Mhz que en un CL11 a 1600Mhz). La mem\u00F2ria , amb un nom similar per\u00F2 tecnologia completament diferent, s'ha fet servir durant alguns anys a targetes gr\u00E0fiques de gamma alta, com les de NVIDIA o , i com a mem\u00F2ria principal del sistema a la Xbox 360. A vegades \u00E9s citada incorrectament com \"DDR3\"."@ca . . . . "DDR3 SDRAM"@pt . . . "DDR3-1333"@en . . . . . "DDR3 SDRAM (ang. Double Data Rate Synchronous Dynamic Random Access Memory (version 3)) \u2013 standard pami\u0119ci RAM typu SDRAM, b\u0119d\u0105cy rozwini\u0119ciem pami\u0119ci DDR i DDR2, stosowanych w komputerach jako pami\u0119\u0107 operacyjna. Standard jest zdefiniowany w dokumencie \u201EJEDEC Standard No. 79-3E\u201D. Pami\u0119ci DDR3 nie s\u0105 kompatybilne wstecz, tzn. nie wsp\u00F3\u0142pracuj\u0105 z chipsetami obs\u0142uguj\u0105cymi DDR i DDR2. Modu\u0142y z pami\u0119ci\u0105 DIMM DDR3 maj\u0105 przesuni\u0119te wci\u0119cie w praw\u0105 stron\u0119 w stosunku do modu\u0142\u00F3w DIMM DDR2. Pami\u0119ci DDR3 wyst\u0119puj\u0105 w modu\u0142ach o pojemno\u015Bci od 512 MB do 16 GB."@pl . "Double Data Rate 3 Synchronous Dynamic Random-Access Memory (DDR3 SDRAM) is a type of synchronous dynamic random-access memory (SDRAM) with a high bandwidth (\"double data rate\") interface, and has been in use since 2007. It is the higher-speed successor to DDR and DDR2 and predecessor to DDR4 synchronous dynamic random-access memory (SDRAM) chips. DDR3 SDRAM is neither forward nor backward compatible with any earlier type of random-access memory (RAM) because of different signaling voltages, timings, and other factors."@en . . . ""@en . "Laptop SODIMM DDR Memory Comparison V2.svg"@en . . "DDR3 \u00E8 lo standard di memorie RAM sviluppato come successore delle memorie DDR2. L'arrivo sul mercato \u00E8 avvenuto nel corso del 2007 ad opera di Intel che ne ha offerto pieno supporto con il proprio chipset Bearlake. AMD lo ha adottato solo nel febbraio 2009."@it . . . . . . "DDR3"@it . "DDR3"@pl . . . . . "DDR3 SDRAM"@en . . "Le DDR3 SDRAM, plus g\u00E9n\u00E9ralement connu sous la forme simplifi\u00E9e DDR3, est un standard de m\u00E9moire vive dynamique \u00E9lectronique d\u00E9fini par le JEDEC, destin\u00E9 \u00E0 \u00EAtre progressivement utilis\u00E9 dans les ordinateurs personnels commercialis\u00E9s \u00E0 partir de l\u2019ann\u00E9e 2007. DDR3 SDRAM est un sigle anglais pour Double Data Rate 3rd generation Synchronous Dynamic Random Access Memory, signifiant en fran\u00E7ais m\u00E9moire \u00E0 acc\u00E8s direct (al\u00E9atoire \u00E9tant une traduction mot \u00E0 mot, qui ne correspond pas \u00E0 l\u2019id\u00E9e d\u2019acc\u00E8s direct \u00E0 une \u00AB case \u00BB m\u00E9moire d\u2019adresse colonne+ligne) synchrone \u00E0 d\u00E9bit de donn\u00E9es doubl\u00E9 de troisi\u00E8me g\u00E9n\u00E9ration. Le standard DDR3 a \u00E9t\u00E9 \u00E9labor\u00E9 dans le but de succ\u00E9der au standard DDR2, en offrant des am\u00E9liorations de performances tout en diminuant la consommation \u00E9lectrique."@fr . "DDR3 SDRAM"@ca . "DDR3-2133"@en . "DDR3 SDRAM (bahasa Inggris: Double Data Rate type 3 Synchronous Dynamic Random Access Memory) adalah istilah komputasi yang ditujukan pada jenis modern dari \"Memori Akses Acak Dinamis\" (bahasa Inggris: Dynamic Random Access Memory) (DRAM) dengan antarmuka yang menggunakan lebar pita tinggi, dan telah digunakan sejak 2007. DDR3 SDRAM tidak kompatibel ke depan maupun ke belakang dengan semua jenis Memori Akses Acak terdahulu manapun, karena perbedaan tegangan pensinyalan, waktu, dan faktor lain."@in . . . . . "4"^^ . "DDR3-SDRAM"@de . "DDR3-1866"@en . . . . "Desktop DDR Memory Comparison.svg"@en . . . "DDR3 SDRAM (de las siglas en ingl\u00E9s, Double Data Rate type three Synchronous Dynamic Random-Access Memory) es un tipo de memoria RAM, de la familia de las SDRAM usadas desde principios de 2011.\u200B\u200B"@es . . . . . "DDR3 SDRAM"@ru . "Notebook and convertible PCs"@en . . . "DDR3 SDRAM (anglicky double-data-rate 3 SDRAM) byl typ opera\u010Dn\u00ED pam\u011Bti pro po\u010D\u00EDta\u010De zve\u0159ejn\u011Bn\u00FD organizac\u00ED JEDEC v roce 2007, ale prodeje p\u0159ekonaly p\u0159edchoz\u00ED generaci DDR2 SDRAM a\u017E v roce 2010. Vzestup prodej\u016F byl d\u00EDky nov\u00FDm procesor\u016Fm Intel Core i7 (vy\u017Eadoval DDR3) a AMD Phenom II (doporu\u010Doval DDR3). DDR3 nen\u00ED zp\u011Btn\u011B kompatibiln\u00ED s DDR2 ani dop\u0159edn\u011B kompatibiln\u00ED s DDR4, p\u0159esto\u017Ee tak\u00E9 pou\u017E\u00EDv\u00E1 pouzdro DIMM (rozd\u00EDly jsou v nap\u00E1jen\u00ED, signalizaci, \u010Dasov\u00E1n\u00ED apod.)."@cs . . . "Three short green circuit boards, identical in size, but each with a notch in a different location"@en . . .