About: ARC (processor)

Facets (new session)
Description
Metadata
Settings
- Rule:
- Inverse Functional Properties:
- "Same As":

About: ARC (processor) Goto Sponge NotDistinct Permalink

An Entity of Type : owl:Thing, within Data Space : dbpedia.demo.openlinksw.com associated with source document(s)
QRcode icon

http://dbpedia.demo.openlinksw.com/describe/?url=http%3A%2F%2Fdbpedia.org%2Fresource%2FARC_%28processor%29

ARC (Argonaut RISC Core) embedded system processors are a family of 32-bit and 64-bit reduced instruction set computer (RISC) central processing units (CPUs) originally designed by ARC International. ARC processors are configurable and extensible for a wide range of uses in system on a chip (SoC) devices, including storage, digital home, mobile, automotive, and Internet of things (IoT) applications. They have been licensed by more than 200 organizations and are shipped in more than 1.5 billion products per year.

Attributes	Values
rdfs:label	ARC (processor) (en)
rdfs:comment	ARC (Argonaut RISC Core) embedded system processors are a family of 32-bit and 64-bit reduced instruction set computer (RISC) central processing units (CPUs) originally designed by ARC International. ARC processors are configurable and extensible for a wide range of uses in system on a chip (SoC) devices, including storage, digital home, mobile, automotive, and Internet of things (IoT) applications. They have been licensed by more than 200 organizations and are shipped in more than 1.5 billion products per year. (en)
foaf:homepage	http://www.synopsys.com/designware-ip/processor-solutions.html
name	ARC (en)
dcterms:subject	Embedded microprocessors Instruction set architectures System on a chip
Wikipage page ID	45245980 (xsd:integer)
Wikipage revision ID	1106594279 (xsd:integer)
Link from a Wikipage to another Wikipage	Santa Cruz, California List of common microcontrollers Goldman Sachs Apax Partners London Stock Exchange Comparison of instruction set architectures Embedded system Hardware register Viterbi algorithm 64-bit computing USB 32-bit computing FPGA Central processing unit Super FX Internet of things Argonaut Games Embedded microprocessors Instruction set architectures System on a chip Super Nintendo Entertainment System Synopsys Initial public offering Instruction set architecture Nashua, New Hampshire Nepean, Ontario Reduced instruction set computer Motion capture Memory management unit System on a chip Virage Logic Multiplier–accumulator
Link from a Wikipage to an external page	https://www.eetimes.com/arc-adopts-clustered-parallelism-in-media-multiprocessing/ https://www.eetimes.com/architectures-programmable-arc-platform-targets-low-cost-multimedia/ https://www.eetimes.com/toshiba-arc-in-configurable-processor-collaboration/ https://web.archive.org/web/20070520164117/http:/neasia.nikkeibp.com/neasia/004524 http://www.eetimes.com/document.asp%3Fdoc_id=1248611
sameAs	ARC (processor) ARC (processor) ARC (processor) ARC (processor) ARC (processor)
dbp:wikiPageUsesTemplate	dbt:More_citations_needed dbt:Official_website dbt:Reflist dbt:Short_description dbt:Start_date_and_age dbt:Use_dmy_dates dbt:Infobox_CPU_architecture dbt:Programmable_logic dbt:RISC_architectures
design	Reduced instruction set computer
designer	ARC International PLC (en)
encoding	Variable (en)
type	Register–Register (en)
version	ARCv3 (en)
has abstract	ARC (Argonaut RISC Core) embedded system processors are a family of 32-bit and 64-bit reduced instruction set computer (RISC) central processing units (CPUs) originally designed by ARC International. ARC processors are configurable and extensible for a wide range of uses in system on a chip (SoC) devices, including storage, digital home, mobile, automotive, and Internet of things (IoT) applications. They have been licensed by more than 200 organizations and are shipped in more than 1.5 billion products per year. ARC processors employ the 16-/32-bit ARCompact instruction set architecture (ISA) that provides good performance and code density for embedded and host SoC applications. (en)
bits	32 (xsd:integer)
branching	Compare and branch (en)
endianness	Bi (en)
extensions	APEX user-defined instructions (en)
registers	16 (xsd:integer)
gold:hypernym	Family
prov:wasDerivedFrom	wikipedia-en:ARC_(processor)?oldid=1106594279&ns=0
page length (characters) of wiki page	7244 (xsd:nonNegativeInteger)
foaf:isPrimaryTopicOf	wikipedia-en:ARC_(processor)
is Link from a Wikipage to another Wikipage of	Mirai (malware) Devicetree Intel Active Management Technology Intel Management Engine GNU Compiler Collection GNU Debugger Glibc Linux MQX Strace Comparison of instruction set architectures Comparison of real-time operating systems Zephyr (operating system) MicroBlaze 64-bit computing ThreadX Link register Linux on embedded systems Load-link/store-conditional Executable and Linkable Format List of Linux-supported computer architectures Super FX ARC ARC International EM4

Faceted Search & Find service v1.17_git139 as of Feb 29 2024

Alternative Linked Data Documents: ODE Content Formats:

RDF

ODATA

Microdata

About

OpenLink Virtuoso version 08.03.3330 as of Mar 19 2024, on Linux (x86_64-generic-linux-glibc212), Single-Server Edition (378 GB total memory, 67 GB memory in use)
Data on this page belongs to its respective rights holders.
Virtuoso Faceted Browser Copyright © 2009-2024 OpenLink Software