About: Logic block

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In computing, a logic block or configurable logic block (CLB) is a fundamental building block of field-programmable gate array (FPGA) technology. Logic blocks can be configured by the engineer to provide reconfigurable logic gates. Logic blocks are the most common FPGA architecture, and are usually laid out within a logic block array. Logic blocks require I/O pads (to interface with external signals), and routing channels (to interconnect logic blocks). Programmable logic blocks were invented by David W. Page and LuVerne R. Peterson, and defined within their 1985 patents.

Attributes	Values
rdf:type	settlement
rdfs:label	Configurable Logic Block (de) Logic block (en)
rdfs:comment	In computing, a logic block or configurable logic block (CLB) is a fundamental building block of field-programmable gate array (FPGA) technology. Logic blocks can be configured by the engineer to provide reconfigurable logic gates. Logic blocks are the most common FPGA architecture, and are usually laid out within a logic block array. Logic blocks require I/O pads (to interface with external signals), and routing channels (to interconnect logic blocks). Programmable logic blocks were invented by David W. Page and LuVerne R. Peterson, and defined within their 1985 patents. (en) Configurable Logic Block (CLB) sind im Bereich der Digitaltechnik Blöcke in einer programmierbaren elektrischen Schaltung, deren interne Elemente Lookup-Tabelle (LUT), AND-OR-Matrizen und Flipflops je nach Erfordernis während der Programmierung in einen bestimmten Zustand gebracht werden und dann später während des Betriebs entsprechend agieren. Des Weiteren befindet sich innerhalb eines CLB verschiedenartige Speicherelemente wie D-Flipflops (DFF) welche jeweils 1 Bit speichern können. Der Umfang und Anordnung der einzelnen elektronischen Schaltungselemente innerhalb eines CLBs ist je nach Bauelement und Hersteller verschiedenartig realisiert. (de)
foaf:depiction
dcterms:subject	Gate arrays
Wikipage page ID	45638668 (xsd:integer)
Wikipage revision ID	1115780026 (xsd:integer)
Link from a Wikipage to another Wikipage	Delay-locked loop Interposer Conventional PCI Clock skew Crossbar switch Clock domain crossing Computing Phase-locked loop Tabula (company) Line code Altera Flip-flop (electronics) PCI Express Fan-out Logic gate Reconfigurable computing Jitter Gate arrays Field-programmable gate array Xilinx Lookup table Multiplexer Ethernet Rent's rule Media access control Systolic array Full adder
sameAs	Logic block Logic block Logic block Logic block Logic block Logic block
dbp:wikiPageUsesTemplate	dbt:Reflist dbt:Short_description dbt:Use_American_English dbt:Programmable_Logic
thumbnail	wiki-commons:Special:FilePath/FPGA_cell_example.png?width=300
has abstract	Configurable Logic Block (CLB) sind im Bereich der Digitaltechnik Blöcke in einer programmierbaren elektrischen Schaltung, deren interne Elemente Lookup-Tabelle (LUT), AND-OR-Matrizen und Flipflops je nach Erfordernis während der Programmierung in einen bestimmten Zustand gebracht werden und dann später während des Betriebs entsprechend agieren. Des Weiteren befindet sich innerhalb eines CLB verschiedenartige Speicherelemente wie D-Flipflops (DFF) welche jeweils 1 Bit speichern können. Der Umfang und Anordnung der einzelnen elektronischen Schaltungselemente innerhalb eines CLBs ist je nach Bauelement und Hersteller verschiedenartig realisiert. CLBs finden sich in Programmierbare logische Schaltungen (PLDs) und Field Programmable Gate Arrays (FPGAs). (de) In computing, a logic block or configurable logic block (CLB) is a fundamental building block of field-programmable gate array (FPGA) technology. Logic blocks can be configured by the engineer to provide reconfigurable logic gates. Logic blocks are the most common FPGA architecture, and are usually laid out within a logic block array. Logic blocks require I/O pads (to interface with external signals), and routing channels (to interconnect logic blocks). Programmable logic blocks were invented by David W. Page and LuVerne R. Peterson, and defined within their 1985 patents. (en)
gold:hypernym	Block
prov:wasDerivedFrom	wikipedia-en:Logic_block?oldid=1115780026&ns=0
page length (characters) of wiki page	10873 (xsd:nonNegativeInteger)
foaf:isPrimaryTopicOf	wikipedia-en:Logic_block
is Link from a Wikipage to another Wikipage of	Verilog-to-Routing Nios II Complex programmable logic device Hardware acceleration Blitter Circuit underutilization Field-programmable gate array ICE (FPGA) CLB Virtex (FPGA)
is foaf:primaryTopic of	wikipedia-en:Logic_block

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