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A programmable logic array (PLA) is a kind of programmable logic device used to implement combinational logic circuits. The PLA has a set of programmable AND gate planes, which link to a set of programmable OR gate planes, which can then be conditionally complemented to produce an output. It has 2N AND gates for N input variables, and for M outputs from PLA, there should be M OR gates, each with programmable inputs from all of the AND gates. This layout allows for many logic functions to be synthesized in the sum of products canonical forms.

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rdfs:label	مصفوفة منطق مبرمجة (ar) Programmierbare logische Anordnung (de) Programmable Logic Array (it) Programmable logic array (en) Programowalna macierz logiczna (pl) Programmerbar logisk matris (sv) 可程式化邏輯陣列 (zh)
rdfs:comment	المصفوفة المنطقية المبرمجة (بالإنجليزية: Programmable Logic Array)‏ أو مختصرة PLA هي عبارة عن توصيل مصفوفتين منطقيتين على التوالي، الأولى تحتوي على بوابة قران (AND Gatter) والمصفوفة الثانية على بوابة اختيار (بوابة أو OR Gatter). تقنياً مصفوفة القران (AND) يتم برمجتها وبوابة OR تختار التركيبات المناسبة لهذه البرمجة من أجل القيام بمهمة ما، كتشغيل محرك أو تفعيل مفتاح دائرة كهربائية ما. (ar) Eine programmierbare logische Anordnung, häufig in englischsprachiger Fachliteratur als Programmable Logic Array oder kurz PLA bezeichnet, ist eine Form der programmierbaren logischen Schaltung, die aus zwei hintereinander geschalteten UND- und ODER-Matrizen besteht. Eine seltener verwendete Bezeichnung ist Fieldprogrammable Logic Array (FPLA). (de) Con programmable logic array (in italiano matrice logica programmabile, spesso abbreviato in PLA), nell'elettronica digitale, indica un dispositivo logico programmabile usato per implementare circuiti logici combinatori. Si tratta del più semplice dispositivo logico programmabile, ideati a loro volta nella seconda metà degli anni 1960, presso i laboratori della Harris Semiconductor, e prodotti a livello industriale verso la fine degli anni '70. (it) Programowalna macierz logiczna, PLA (od ang. programmable logic array) – rodzaj układów programowalnych PLD zawierających dwie macierze programowalne: AND oraz OR. W układzie PAL jest tylko jedna matryca AND, a bramki OR są wbudowane. W układach PLA natomiast funkcję bramek OR pełni właśnie druga programowalna macierz OR, co czyni te układy dużo bardziej elastycznymi. (pl) Programmerbar logisk matris (engelska: Programmable logic array, PLA) är inom digitalteknik en metod med vars hjälp det är möjligt att införa "och" och "eller" logik för Boolesk algebra i en integrerad krets vid tillverkningen. (sv) 可程式化邏輯陣列（Programmable Logic Array）（PLA）是一種可以實作組合邏輯電路的可程式邏輯裝置。PLA有一組可編程的AND閘，其連接到一組可編程的OR閘，如此可以達到：「只在合乎設定條件時才允許產生邏輯訊號輸出。」PLA有2^N個AND閘來輸入N個變數，並且需要M個OR閘來輸出M個結果。PLA如此的邏輯閘佈局能用來規劃大量的邏輯函式，這些邏輯函式必須先以積項（有時是多個積項）的原始形式進行齊一化。 PLA與可程式陣列邏輯裝置（PAL）的差別為PLA的AND閘、OR閘皆可修改。 (zh) A programmable logic array (PLA) is a kind of programmable logic device used to implement combinational logic circuits. The PLA has a set of programmable AND gate planes, which link to a set of programmable OR gate planes, which can then be conditionally complemented to produce an output. It has 2N AND gates for N input variables, and for M outputs from PLA, there should be M OR gates, each with programmable inputs from all of the AND gates. This layout allows for many logic functions to be synthesized in the sum of products canonical forms. (en)
differentFrom	Programmable Array Logic
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Link from a Wikipage to another Wikipage	Programmable Array Logic Electrical network Read-only memory Electronic design automation University of Hamburg Combinational logic Commodore 64 Gate array Generic array logic OR gate Programmable array logic MOS Technology 6502 Programmable logic device Datapath Texas Instruments State diagram AND gate Gate arrays Field-programmable gate array IBM Photomask Sum of products University of Maryland Canonical form (Boolean algebra) JK flip-flops Associative storage
Link from a Wikipage to an external page	http://tams-www.informatik.uni-hamburg.de/applets/hades/webdemos/42-programmable/10-pla/pla.html http://www.cs.umd.edu/class/spring2003/cmsc311/Notes/Comb/pla.html https://web.archive.org/web/20130115113124/http:/tams-www.informatik.uni-hamburg.de/applets/hades/webdemos/42-programmable/10-pla/pla.html https://web.archive.org/web/20171214191144/www.cs.umd.edu/class/spring2003/cmsc311/Notes/Comb/pla.html
sameAs	Programmable logic array Programmable logic array Programmable logic array Programmable logic array Programmable logic array Programmable logic array Programmable logic array Programmable logic array Programmable logic array Programmable logic array Programmable logic array Programmable logic array Programmable logic array Programmable logic array Programmable logic array
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has abstract	المصفوفة المنطقية المبرمجة (بالإنجليزية: Programmable Logic Array)‏ أو مختصرة PLA هي عبارة عن توصيل مصفوفتين منطقيتين على التوالي، الأولى تحتوي على بوابة قران (AND Gatter) والمصفوفة الثانية على بوابة اختيار (بوابة أو OR Gatter). تقنياً مصفوفة القران (AND) يتم برمجتها وبوابة OR تختار التركيبات المناسبة لهذه البرمجة من أجل القيام بمهمة ما، كتشغيل محرك أو تفعيل مفتاح دائرة كهربائية ما. (ar) Eine programmierbare logische Anordnung, häufig in englischsprachiger Fachliteratur als Programmable Logic Array oder kurz PLA bezeichnet, ist eine Form der programmierbaren logischen Schaltung, die aus zwei hintereinander geschalteten UND- und ODER-Matrizen besteht. Eine seltener verwendete Bezeichnung ist Fieldprogrammable Logic Array (FPLA). (de) A programmable logic array (PLA) is a kind of programmable logic device used to implement combinational logic circuits. The PLA has a set of programmable AND gate planes, which link to a set of programmable OR gate planes, which can then be conditionally complemented to produce an output. It has 2N AND gates for N input variables, and for M outputs from PLA, there should be M OR gates, each with programmable inputs from all of the AND gates. This layout allows for many logic functions to be synthesized in the sum of products canonical forms. PLAs differ from programmable array logic devices (PALs and GALs) in that both the AND and OR gate planes are programmable.[PAL has programmable AND gates but fixed OR gates] (en) Con programmable logic array (in italiano matrice logica programmabile, spesso abbreviato in PLA), nell'elettronica digitale, indica un dispositivo logico programmabile usato per implementare circuiti logici combinatori. Si tratta del più semplice dispositivo logico programmabile, ideati a loro volta nella seconda metà degli anni 1960, presso i laboratori della Harris Semiconductor, e prodotti a livello industriale verso la fine degli anni '70. (it) Programowalna macierz logiczna, PLA (od ang. programmable logic array) – rodzaj układów programowalnych PLD zawierających dwie macierze programowalne: AND oraz OR. W układzie PAL jest tylko jedna matryca AND, a bramki OR są wbudowane. W układach PLA natomiast funkcję bramek OR pełni właśnie druga programowalna macierz OR, co czyni te układy dużo bardziej elastycznymi. (pl) Programmerbar logisk matris (engelska: Programmable logic array, PLA) är inom digitalteknik en metod med vars hjälp det är möjligt att införa "och" och "eller" logik för Boolesk algebra i en integrerad krets vid tillverkningen. (sv) 可程式化邏輯陣列（Programmable Logic Array）（PLA）是一種可以實作組合邏輯電路的可程式邏輯裝置。PLA有一組可編程的AND閘，其連接到一組可編程的OR閘，如此可以達到：「只在合乎設定條件時才允許產生邏輯訊號輸出。」PLA有2^N個AND閘來輸入N個變數，並且需要M個OR閘來輸出M個結果。PLA如此的邏輯閘佈局能用來規劃大量的邏輯函式，這些邏輯函式必須先以積項（有時是多個積項）的原始形式進行齊一化。 PLA與可程式陣列邏輯裝置（PAL）的差別為PLA的AND閘、OR閘皆可修改。 (zh)
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is Link from a Wikipage to another Wikipage of	Programmable Array Logic Programmer (hardware) List of acronyms: P Pathwidth Pentium FDIV bug Intel 8086 Intel Microcode

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