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A semiconductor package is a metal, plastic, glass, or ceramic casing containing one or more discrete semiconductor devices or integrated circuits. Individual components are fabricated on semiconductor wafers (commonly silicon) before being diced into die, tested, and packaged. The package provides a means for connecting it to the external environment, such as printed circuit board, via leads such as lands, balls, or pins; and protection against threats such as mechanical impact, chemical contamination, and light exposure. Additionally, it helps dissipate heat produced by the device, with or without the aid of a heat spreader. There are thousands of package types in use. Some are defined by international, national, or industry standards, while others are particular to an individual manufac

Attributes	Values
rdf:type	Thing yago:WikicatSemiconductorPackages yago:Abstraction100002137 yago:Collection107951464 yago:Group100031264 yago:Package108008017 Band
rdfs:label	Chipgehäuse (de) Boîtier de circuit intégré (fr) Package (elettronica) (it) Semiconductor package (en) Encapsulamento de circuitos integrados (pt) 半導體封裝 (zh)
rdfs:comment	Die Ummantelung eines Halbleiterchips (eines Die) inklusive der Anschlussstellen (Leads, Pins oder Balls) bezeichnet man als Gehäuse oder Package. Es existieren zahlreiche Variationen solcher Gehäuse, die sich in ihrer Form, den verwendeten Materialien, der Anzahl und Anordnung der Pins und anderen Eigenschaften unterscheiden. Dieser Artikel erfasst die Gehäusevarianten für Integrierte Schaltungen, die für diskrete Bauelemente finden sich in der Liste von Halbleitergehäusen. (de) Un boîtier de circuit intégré (ou package) est un boîtier servant à la fois de jonction électrique et d'interface mécanique entre la puce du circuit intégré et le circuit imprimé. Il est généralement composé de plastique, parfois de céramique, rarement de métal. Certains boîtiers possèdent des fenêtres transparentes permettant par exemple l'effacement par ultraviolet de certaines mémoires (EPROM). (fr) Un package (in italiano, capsula), indica il contenitore in cui sono racchiusi alcuni tipi di componenti elettronici. (it) 半導體封裝（semiconductor package），是一種用於容納、包覆一個或多個半導體元件或積體電路的載體/外殼，外殼的材料可以是金屬、塑料、玻璃、或者是陶瓷。當半導體元器件核心或積體電路等從晶圓上刻蝕出來並切割成為獨立的晶粒以後，在積體電路封裝階段，將一個或數個晶粒與半導體封裝組裝或灌封為一體。半導體封裝為晶粒提供一定的衝擊/划傷保護，為晶粒提供與外部電路連接的引腳或觸點，在晶粒工作時幫助將晶粒工作產生的熱量帶走。如今半導體元器件以及積體電路的封裝種類繁多，其中有不少為半導體之業界標準，而另一些則是元器件或積體電路製造商的特殊規格。 (zh) A semiconductor package is a metal, plastic, glass, or ceramic casing containing one or more discrete semiconductor devices or integrated circuits. Individual components are fabricated on semiconductor wafers (commonly silicon) before being diced into die, tested, and packaged. The package provides a means for connecting it to the external environment, such as printed circuit board, via leads such as lands, balls, or pins; and protection against threats such as mechanical impact, chemical contamination, and light exposure. Additionally, it helps dissipate heat produced by the device, with or without the aid of a heat spreader. There are thousands of package types in use. Some are defined by international, national, or industry standards, while others are particular to an individual manufac (en) O encapsulamento de circuitos integrados é o estágio final da fabricação de dispositivos semicondutores, no qual o bloco de material semicondutor é encapsulado em um invólucro de suporte que evita danos físicos e corrosão. Há vários materiais que podem ser usados no encapsulamento, tais como plástico e cerâmica, que são os mais comumente utilizados. No projeto do encapsulamento, fatores elétricos, mecânicos, térmicos e econômicos são levados em consideração. O estágio de encapsulamento é seguido pelo teste do circuito integrado. O estágio de encapsulamento é seguido pelo teste do circuito integrado. (pt)
foaf:depiction
dct:subject	Semiconductor packages
Wikipage page ID	23889797 (xsd:integer)
Wikipage revision ID	1123955999 (xsd:integer)
Link from a Wikipage to another Wikipage	Quartz Solder List of integrated circuit package dimensions Semiconductor packages Ultraviolet light VLSI Vacuum tubes Integrated circuit Integrated circuit packaging JEDEC System/360 Through-hole Epoxy Cresol Pro Electron Chip carrier Frit Passivation (chemistry) Plastic Through-hole technology Wafer (electronics) Dual in-line package Leakage (electronics) Heat sinks Alpha particle EPROM Flip chip Germanium Semiconductor device fabrication RKM code Heat spreader EIAJ Laser marking Zero insertion force Soft error Stray light Gold-aluminium intermetallic IBM IBM Solid Logic Technology Microwave Cache memory Printed circuit board Wire bonding Single event upset Surface-mount technology Semiconductor Semiconductor device Silicon Waste heat Diodes Point-contact transistor Firmware Flatpack (electronics) Spot welding Microprocessors Thyristor ISO week Stray current Surface mount Week number dbr:Novolaks
Link from a Wikipage to an external page	http://semiconductormuseum.com/ http://www.jedec.org/standards-documents/focus/registered-outlines-jep95/transistor-outlines-archive
sameAs	Semiconductor package Semiconductor package Semiconductor package Semiconductor package Semiconductor package Semiconductor package

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